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-rw-r--r--arch/arm/plat-omap/dma.c14
1 files changed, 14 insertions, 0 deletions
diff --git a/arch/arm/plat-omap/dma.c b/arch/arm/plat-omap/dma.c
index b53125f41293..68eaae324b6a 100644
--- a/arch/arm/plat-omap/dma.c
+++ b/arch/arm/plat-omap/dma.c
@@ -691,13 +691,16 @@ static inline void disable_lnk(int lch)
691static inline void omap2_enable_irq_lch(int lch) 691static inline void omap2_enable_irq_lch(int lch)
692{ 692{
693 u32 val; 693 u32 val;
694 unsigned long flags;
694 695
695 if (!cpu_class_is_omap2()) 696 if (!cpu_class_is_omap2())
696 return; 697 return;
697 698
699 spin_lock_irqsave(&dma_chan_lock, flags);
698 val = dma_read(IRQENABLE_L0); 700 val = dma_read(IRQENABLE_L0);
699 val |= 1 << lch; 701 val |= 1 << lch;
700 dma_write(val, IRQENABLE_L0); 702 dma_write(val, IRQENABLE_L0);
703 spin_unlock_irqrestore(&dma_chan_lock, flags);
701} 704}
702 705
703int omap_request_dma(int dev_id, const char *dev_name, 706int omap_request_dma(int dev_id, const char *dev_name,
@@ -799,10 +802,13 @@ void omap_free_dma(int lch)
799 802
800 if (cpu_class_is_omap2()) { 803 if (cpu_class_is_omap2()) {
801 u32 val; 804 u32 val;
805
806 spin_lock_irqsave(&dma_chan_lock, flags);
802 /* Disable interrupts */ 807 /* Disable interrupts */
803 val = dma_read(IRQENABLE_L0); 808 val = dma_read(IRQENABLE_L0);
804 val &= ~(1 << lch); 809 val &= ~(1 << lch);
805 dma_write(val, IRQENABLE_L0); 810 dma_write(val, IRQENABLE_L0);
811 spin_unlock_irqrestore(&dma_chan_lock, flags);
806 812
807 /* Clear the CSR register and IRQ status register */ 813 /* Clear the CSR register and IRQ status register */
808 dma_write(OMAP2_DMA_CSR_CLEAR_MASK, CSR(lch)); 814 dma_write(OMAP2_DMA_CSR_CLEAR_MASK, CSR(lch));
@@ -1108,6 +1114,14 @@ int omap_dma_running(void)
1108{ 1114{
1109 int lch; 1115 int lch;
1110 1116
1117 /*
1118 * On OMAP1510, internal LCD controller will start the transfer
1119 * when it gets enabled, so assume DMA running if LCD enabled.
1120 */
1121 if (cpu_is_omap1510())
1122 if (omap_readw(0xfffec000 + 0x00) & (1 << 0))
1123 return 1;
1124
1111 /* Check if LCD DMA is running */ 1125 /* Check if LCD DMA is running */
1112 if (cpu_is_omap16xx()) 1126 if (cpu_is_omap16xx())
1113 if (omap_readw(OMAP1610_DMA_LCD_CCR) & OMAP_DMA_CCR_EN) 1127 if (omap_readw(OMAP1610_DMA_LCD_CCR) & OMAP_DMA_CCR_EN)