diff options
Diffstat (limited to 'arch/arm/plat-omap/dma.c')
-rw-r--r-- | arch/arm/plat-omap/dma.c | 16 |
1 files changed, 7 insertions, 9 deletions
diff --git a/arch/arm/plat-omap/dma.c b/arch/arm/plat-omap/dma.c index 692d2b495af3..47ec77af4ccb 100644 --- a/arch/arm/plat-omap/dma.c +++ b/arch/arm/plat-omap/dma.c | |||
@@ -278,14 +278,11 @@ void omap_set_dma_transfer_params(int lch, int data_type, int elem_count, | |||
278 | u32 val; | 278 | u32 val; |
279 | 279 | ||
280 | val = dma_read(CCR(lch)); | 280 | val = dma_read(CCR(lch)); |
281 | val &= ~(3 << 19); | ||
282 | if (dma_trigger > 63) | ||
283 | val |= 1 << 20; | ||
284 | if (dma_trigger > 31) | ||
285 | val |= 1 << 19; | ||
286 | 281 | ||
287 | val &= ~(0x1f); | 282 | /* DMA_SYNCHRO_CONTROL_UPPER depends on the channel number */ |
288 | val |= (dma_trigger & 0x1f); | 283 | val &= ~((3 << 19) | 0x1f); |
284 | val |= (dma_trigger & ~0x1f) << 14; | ||
285 | val |= dma_trigger & 0x1f; | ||
289 | 286 | ||
290 | if (sync_mode & OMAP_DMA_SYNC_FRAME) | 287 | if (sync_mode & OMAP_DMA_SYNC_FRAME) |
291 | val |= 1 << 5; | 288 | val |= 1 << 5; |
@@ -712,6 +709,7 @@ int omap_request_dma(int dev_id, const char *dev_name, | |||
712 | chan->dev_name = dev_name; | 709 | chan->dev_name = dev_name; |
713 | chan->callback = callback; | 710 | chan->callback = callback; |
714 | chan->data = data; | 711 | chan->data = data; |
712 | chan->flags = 0; | ||
715 | 713 | ||
716 | #ifndef CONFIG_ARCH_OMAP1 | 714 | #ifndef CONFIG_ARCH_OMAP1 |
717 | if (cpu_class_is_omap2()) { | 715 | if (cpu_class_is_omap2()) { |
@@ -1891,11 +1889,11 @@ static int omap2_dma_handle_ch(int ch) | |||
1891 | status = dma_read(CSR(ch)); | 1889 | status = dma_read(CSR(ch)); |
1892 | } | 1890 | } |
1893 | 1891 | ||
1892 | dma_write(status, CSR(ch)); | ||
1893 | |||
1894 | if (likely(dma_chan[ch].callback != NULL)) | 1894 | if (likely(dma_chan[ch].callback != NULL)) |
1895 | dma_chan[ch].callback(ch, status, dma_chan[ch].data); | 1895 | dma_chan[ch].callback(ch, status, dma_chan[ch].data); |
1896 | 1896 | ||
1897 | dma_write(status, CSR(ch)); | ||
1898 | |||
1899 | return 0; | 1897 | return 0; |
1900 | } | 1898 | } |
1901 | 1899 | ||