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-rw-r--r--arch/arm/plat-omap/dma.c13
1 files changed, 11 insertions, 2 deletions
diff --git a/arch/arm/plat-omap/dma.c b/arch/arm/plat-omap/dma.c
index c58d896cd5c3..987e6101267d 100644
--- a/arch/arm/plat-omap/dma.c
+++ b/arch/arm/plat-omap/dma.c
@@ -41,6 +41,15 @@
41 41
42#include <plat/tc.h> 42#include <plat/tc.h>
43 43
44/*
45 * MAX_LOGICAL_DMA_CH_COUNT: the maximum number of logical DMA
46 * channels that an instance of the SDMA IP block can support. Used
47 * to size arrays. (The actual maximum on a particular SoC may be less
48 * than this -- for example, OMAP1 SDMA instances only support 17 logical
49 * DMA channels.)
50 */
51#define MAX_LOGICAL_DMA_CH_COUNT 32
52
44#undef DEBUG 53#undef DEBUG
45 54
46#ifndef CONFIG_ARCH_OMAP1 55#ifndef CONFIG_ARCH_OMAP1
@@ -883,7 +892,7 @@ void omap_start_dma(int lch)
883 892
884 if (!omap_dma_in_1510_mode() && dma_chan[lch].next_lch != -1) { 893 if (!omap_dma_in_1510_mode() && dma_chan[lch].next_lch != -1) {
885 int next_lch, cur_lch; 894 int next_lch, cur_lch;
886 char dma_chan_link_map[dma_lch_count]; 895 char dma_chan_link_map[MAX_LOGICAL_DMA_CH_COUNT];
887 896
888 dma_chan_link_map[lch] = 1; 897 dma_chan_link_map[lch] = 1;
889 /* Set the link register of the first channel */ 898 /* Set the link register of the first channel */
@@ -981,7 +990,7 @@ void omap_stop_dma(int lch)
981 990
982 if (!omap_dma_in_1510_mode() && dma_chan[lch].next_lch != -1) { 991 if (!omap_dma_in_1510_mode() && dma_chan[lch].next_lch != -1) {
983 int next_lch, cur_lch = lch; 992 int next_lch, cur_lch = lch;
984 char dma_chan_link_map[dma_lch_count]; 993 char dma_chan_link_map[MAX_LOGICAL_DMA_CH_COUNT];
985 994
986 memset(dma_chan_link_map, 0, sizeof(dma_chan_link_map)); 995 memset(dma_chan_link_map, 0, sizeof(dma_chan_link_map));
987 do { 996 do {