1 files changed, 5 insertions, 5 deletions

diff --git a/arch/arm/plat-omap/dma.c b/arch/arm/plat-omap/dma.c
index 728c64204184..2ab224c8e16c 100644
--- a/arch/arm/plat-omap/dma.c
+++ b/arch/arm/plat-omap/dma.c
@@ -1870,8 +1870,7 @@ static irqreturn_t omap1_dma_irq_handler(int irq, void *dev_id)
 #define omap1_dma_irq_handler   NULL
 #endif
 
-#if defined(CONFIG_ARCH_OMAP2) || defined(CONFIG_ARCH_OMAP3) || \
-                        defined(CONFIG_ARCH_OMAP4)
+#ifdef CONFIG_ARCH_OMAP2PLUS
 
 static int omap2_dma_handle_ch(int ch)
 {
@@ -2133,13 +2132,13 @@ static int __init omap_init_dma(void)
         if (cpu_class_is_omap2()) {
                 int irq;
                 if (cpu_is_omap44xx())
-                        irq = INT_44XX_SDMA_IRQ0;
+                        irq = OMAP44XX_IRQ_SDMA_0;
                 else
                         irq = INT_24XX_SDMA_IRQ0;
                 setup_irq(irq, &omap24xx_dma_irq);
         }
 
-        if (cpu_is_omap34xx()) {
+        if (cpu_is_omap34xx() || cpu_is_omap44xx()) {
                 /* Enable smartidle idlemodes and autoidle */
                 u32 v = dma_read(OCP_SYSCONFIG);
                 v &= ~(DMA_SYSCONFIG_MIDLEMODE_MASK |
@@ -2150,7 +2149,8 @@ static int __init omap_init_dma(void)
                         DMA_SYSCONFIG_AUTOIDLE);
                 dma_write(v , OCP_SYSCONFIG);
                 /* reserve dma channels 0 and 1 in high security devices */
-                if (omap_type() != OMAP2_DEVICE_TYPE_GP) {
+                if (cpu_is_omap34xx() &&
+                        (omap_type() != OMAP2_DEVICE_TYPE_GP)) {
                         printk(KERN_INFO "Reserving DMA channels 0 and 1 for "
                                         "HS ROM code\n");
                         dma_chan[0].dev_id = 0;