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-rw-r--r--arch/arm/plat-omap/dma.c4
1 files changed, 3 insertions, 1 deletions
diff --git a/arch/arm/plat-omap/dma.c b/arch/arm/plat-omap/dma.c
index b1d3c7991ffd..21cc0142b97a 100644
--- a/arch/arm/plat-omap/dma.c
+++ b/arch/arm/plat-omap/dma.c
@@ -1901,7 +1901,7 @@ static int omap2_dma_handle_ch(int ch)
1901/* STATUS register count is from 1-32 while our is 0-31 */ 1901/* STATUS register count is from 1-32 while our is 0-31 */
1902static irqreturn_t omap2_dma_irq_handler(int irq, void *dev_id) 1902static irqreturn_t omap2_dma_irq_handler(int irq, void *dev_id)
1903{ 1903{
1904 u32 val; 1904 u32 val, enable_reg;
1905 int i; 1905 int i;
1906 1906
1907 val = dma_read(IRQSTATUS_L0); 1907 val = dma_read(IRQSTATUS_L0);
@@ -1910,6 +1910,8 @@ static irqreturn_t omap2_dma_irq_handler(int irq, void *dev_id)
1910 printk(KERN_WARNING "Spurious DMA IRQ\n"); 1910 printk(KERN_WARNING "Spurious DMA IRQ\n");
1911 return IRQ_HANDLED; 1911 return IRQ_HANDLED;
1912 } 1912 }
1913 enable_reg = dma_read(IRQENABLE_L0);
1914 val &= enable_reg; /* Dispatch only relevant interrupts */
1913 for (i = 0; i < dma_lch_count && val != 0; i++) { 1915 for (i = 0; i < dma_lch_count && val != 0; i++) {
1914 if (val & 1) 1916 if (val & 1)
1915 omap2_dma_handle_ch(i); 1917 omap2_dma_handle_ch(i);