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-rw-r--r--arch/arm/plat-omap/common.c47
1 files changed, 44 insertions, 3 deletions
diff --git a/arch/arm/plat-omap/common.c b/arch/arm/plat-omap/common.c
index 7f1cae16cfad..bd1cef2c3c14 100644
--- a/arch/arm/plat-omap/common.c
+++ b/arch/arm/plat-omap/common.c
@@ -27,11 +27,16 @@
27#include <asm/setup.h> 27#include <asm/setup.h>
28 28
29#include <asm/arch/board.h> 29#include <asm/arch/board.h>
30#include <asm/arch/control.h>
30#include <asm/arch/mux.h> 31#include <asm/arch/mux.h>
31#include <asm/arch/fpga.h> 32#include <asm/arch/fpga.h>
32 33
33#include <asm/arch/clock.h> 34#include <asm/arch/clock.h>
34 35
36#if defined(CONFIG_ARCH_OMAP2) || defined(CONFIG_ARCH_OMAP3)
37# include "../mach-omap2/sdrc.h"
38#endif
39
35#define NO_LENGTH_CHECK 0xffffffff 40#define NO_LENGTH_CHECK 0xffffffff
36 41
37unsigned char omap_bootloader_tag[512]; 42unsigned char omap_bootloader_tag[512];
@@ -171,8 +176,8 @@ console_initcall(omap_add_serial_console);
171 176
172#if defined(CONFIG_ARCH_OMAP16XX) 177#if defined(CONFIG_ARCH_OMAP16XX)
173#define TIMER_32K_SYNCHRONIZED 0xfffbc410 178#define TIMER_32K_SYNCHRONIZED 0xfffbc410
174#elif defined(CONFIG_ARCH_OMAP24XX) 179#elif defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX)
175#define TIMER_32K_SYNCHRONIZED (OMAP24XX_32KSYNCT_BASE + 0x10) 180#define TIMER_32K_SYNCHRONIZED (OMAP2_32KSYNCT_BASE + 0x10)
176#endif 181#endif
177 182
178#ifdef TIMER_32K_SYNCHRONIZED 183#ifdef TIMER_32K_SYNCHRONIZED
@@ -215,7 +220,13 @@ static int __init omap_init_clocksource_32k(void)
215 static char err[] __initdata = KERN_ERR 220 static char err[] __initdata = KERN_ERR
216 "%s: can't register clocksource!\n"; 221 "%s: can't register clocksource!\n";
217 222
218 if (cpu_is_omap16xx() || cpu_is_omap24xx()) { 223 if (cpu_is_omap16xx() || cpu_class_is_omap2()) {
224 struct clk *sync_32k_ick;
225
226 sync_32k_ick = clk_get(NULL, "omap_32ksync_ick");
227 if (sync_32k_ick)
228 clk_enable(sync_32k_ick);
229
219 clocksource_32k.mult = clocksource_hz2mult(32768, 230 clocksource_32k.mult = clocksource_hz2mult(32768,
220 clocksource_32k.shift); 231 clocksource_32k.shift);
221 232
@@ -227,3 +238,33 @@ static int __init omap_init_clocksource_32k(void)
227arch_initcall(omap_init_clocksource_32k); 238arch_initcall(omap_init_clocksource_32k);
228 239
229#endif /* TIMER_32K_SYNCHRONIZED */ 240#endif /* TIMER_32K_SYNCHRONIZED */
241
242/* Global address base setup code */
243
244#if defined(CONFIG_ARCH_OMAP2420)
245void __init omap2_set_globals_242x(void)
246{
247 omap2_sdrc_base = OMAP2420_SDRC_BASE;
248 omap2_sms_base = OMAP2420_SMS_BASE;
249 omap_ctrl_base_set(OMAP2420_CTRL_BASE);
250}
251#endif
252
253#if defined(CONFIG_ARCH_OMAP2430)
254void __init omap2_set_globals_243x(void)
255{
256 omap2_sdrc_base = OMAP243X_SDRC_BASE;
257 omap2_sms_base = OMAP243X_SMS_BASE;
258 omap_ctrl_base_set(OMAP243X_CTRL_BASE);
259}
260#endif
261
262#if defined(CONFIG_ARCH_OMAP3430)
263void __init omap2_set_globals_343x(void)
264{
265 omap2_sdrc_base = OMAP343X_SDRC_BASE;
266 omap2_sms_base = OMAP343X_SMS_BASE;
267 omap_ctrl_base_set(OMAP343X_CTRL_BASE);
268}
269#endif
270