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-rw-r--r--arch/arm/plat-mxc/3ds_debugboard.c9
-rw-r--r--arch/arm/plat-mxc/Kconfig6
-rw-r--r--arch/arm/plat-mxc/Makefile2
-rw-r--r--arch/arm/plat-mxc/audmux-v1.c64
-rw-r--r--arch/arm/plat-mxc/audmux-v2.c219
-rw-r--r--arch/arm/plat-mxc/avic.c2
-rw-r--r--arch/arm/plat-mxc/devices/platform-mx2-camera.c18
-rw-r--r--arch/arm/plat-mxc/include/mach/audmux.h60
-rw-r--r--arch/arm/plat-mxc/include/mach/devices-common.h2
-rw-r--r--arch/arm/plat-mxc/include/mach/entry-macro.S16
-rw-r--r--arch/arm/plat-mxc/include/mach/iomux-mx25.h42
-rw-r--r--arch/arm/plat-mxc/include/mach/mxc_ehci.h2
-rw-r--r--arch/arm/plat-mxc/include/mach/ulpi.h6
-rw-r--r--arch/arm/plat-mxc/ulpi.c8
14 files changed, 59 insertions, 397 deletions
diff --git a/arch/arm/plat-mxc/3ds_debugboard.c b/arch/arm/plat-mxc/3ds_debugboard.c
index f0ba0726306c..d1e31fa1b0c3 100644
--- a/arch/arm/plat-mxc/3ds_debugboard.c
+++ b/arch/arm/plat-mxc/3ds_debugboard.c
@@ -16,6 +16,8 @@
16#include <linux/platform_device.h> 16#include <linux/platform_device.h>
17#include <linux/gpio.h> 17#include <linux/gpio.h>
18#include <linux/smsc911x.h> 18#include <linux/smsc911x.h>
19#include <linux/regulator/machine.h>
20#include <linux/regulator/fixed.h>
19 21
20#include <mach/hardware.h> 22#include <mach/hardware.h>
21 23
@@ -148,6 +150,11 @@ static struct irq_chip expio_irq_chip = {
148 .irq_unmask = expio_unmask_irq, 150 .irq_unmask = expio_unmask_irq,
149}; 151};
150 152
153static struct regulator_consumer_supply dummy_supplies[] = {
154 REGULATOR_SUPPLY("vdd33a", "smsc911x"),
155 REGULATOR_SUPPLY("vddvario", "smsc911x"),
156};
157
151int __init mxc_expio_init(u32 base, u32 p_irq) 158int __init mxc_expio_init(u32 base, u32 p_irq)
152{ 159{
153 int i; 160 int i;
@@ -188,6 +195,8 @@ int __init mxc_expio_init(u32 base, u32 p_irq)
188 irq_set_chained_handler(p_irq, mxc_expio_irq_handler); 195 irq_set_chained_handler(p_irq, mxc_expio_irq_handler);
189 196
190 /* Register Lan device on the debugboard */ 197 /* Register Lan device on the debugboard */
198 regulator_register_fixed(0, dummy_supplies, ARRAY_SIZE(dummy_supplies));
199
191 smsc911x_resources[0].start = LAN9217_BASE_ADDR(base); 200 smsc911x_resources[0].start = LAN9217_BASE_ADDR(base);
192 smsc911x_resources[0].end = LAN9217_BASE_ADDR(base) + 0x100 - 1; 201 smsc911x_resources[0].end = LAN9217_BASE_ADDR(base) + 0x100 - 1;
193 platform_device_register(&smsc_lan9217_device); 202 platform_device_register(&smsc_lan9217_device);
diff --git a/arch/arm/plat-mxc/Kconfig b/arch/arm/plat-mxc/Kconfig
index dcebb1230f7f..c722f9ce6918 100644
--- a/arch/arm/plat-mxc/Kconfig
+++ b/arch/arm/plat-mxc/Kconfig
@@ -88,12 +88,6 @@ config IMX_HAVE_IOMUX_V1
88config ARCH_MXC_IOMUX_V3 88config ARCH_MXC_IOMUX_V3
89 bool 89 bool
90 90
91config ARCH_MXC_AUDMUX_V1
92 bool
93
94config ARCH_MXC_AUDMUX_V2
95 bool
96
97config IRAM_ALLOC 91config IRAM_ALLOC
98 bool 92 bool
99 select GENERIC_ALLOCATOR 93 select GENERIC_ALLOCATOR
diff --git a/arch/arm/plat-mxc/Makefile b/arch/arm/plat-mxc/Makefile
index 076db84f3e31..e81290c27c65 100644
--- a/arch/arm/plat-mxc/Makefile
+++ b/arch/arm/plat-mxc/Makefile
@@ -14,8 +14,6 @@ obj-$(CONFIG_IRAM_ALLOC) += iram_alloc.o
14obj-$(CONFIG_MXC_PWM) += pwm.o 14obj-$(CONFIG_MXC_PWM) += pwm.o
15obj-$(CONFIG_MXC_ULPI) += ulpi.o 15obj-$(CONFIG_MXC_ULPI) += ulpi.o
16obj-$(CONFIG_MXC_USE_EPIT) += epit.o 16obj-$(CONFIG_MXC_USE_EPIT) += epit.o
17obj-$(CONFIG_ARCH_MXC_AUDMUX_V1) += audmux-v1.o
18obj-$(CONFIG_ARCH_MXC_AUDMUX_V2) += audmux-v2.o
19obj-$(CONFIG_MXC_DEBUG_BOARD) += 3ds_debugboard.o 17obj-$(CONFIG_MXC_DEBUG_BOARD) += 3ds_debugboard.o
20obj-$(CONFIG_CPU_FREQ_IMX) += cpufreq.o 18obj-$(CONFIG_CPU_FREQ_IMX) += cpufreq.o
21ifdef CONFIG_SND_IMX_SOC 19ifdef CONFIG_SND_IMX_SOC
diff --git a/arch/arm/plat-mxc/audmux-v1.c b/arch/arm/plat-mxc/audmux-v1.c
deleted file mode 100644
index 1180bef7664b..000000000000
--- a/arch/arm/plat-mxc/audmux-v1.c
+++ /dev/null
@@ -1,64 +0,0 @@
1/*
2 * Copyright 2009 Pengutronix, Sascha Hauer <s.hauer@pengutronix.de>
3 *
4 * Initial development of this code was funded by
5 * Phytec Messtechnik GmbH, http://www.phytec.de
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; either version 2 of the License, or
10 * (at your option) any later version.
11 *
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
16 */
17
18#include <linux/module.h>
19#include <linux/err.h>
20#include <linux/io.h>
21#include <linux/clk.h>
22#include <mach/audmux.h>
23#include <mach/hardware.h>
24
25static void __iomem *audmux_base;
26
27static unsigned char port_mapping[] = {
28 0x0, 0x4, 0x8, 0x10, 0x14, 0x1c,
29};
30
31int mxc_audmux_v1_configure_port(unsigned int port, unsigned int pcr)
32{
33 if (!audmux_base) {
34 printk("%s: not configured\n", __func__);
35 return -ENOSYS;
36 }
37
38 if (port >= ARRAY_SIZE(port_mapping))
39 return -EINVAL;
40
41 writel(pcr, audmux_base + port_mapping[port]);
42
43 return 0;
44}
45EXPORT_SYMBOL_GPL(mxc_audmux_v1_configure_port);
46
47static int mxc_audmux_v1_init(void)
48{
49#ifdef CONFIG_MACH_MX21
50 if (cpu_is_mx21())
51 audmux_base = MX21_IO_ADDRESS(MX21_AUDMUX_BASE_ADDR);
52 else
53#endif
54#ifdef CONFIG_MACH_MX27
55 if (cpu_is_mx27())
56 audmux_base = MX27_IO_ADDRESS(MX27_AUDMUX_BASE_ADDR);
57 else
58#endif
59 (void)0;
60
61 return 0;
62}
63
64postcore_initcall(mxc_audmux_v1_init);
diff --git a/arch/arm/plat-mxc/audmux-v2.c b/arch/arm/plat-mxc/audmux-v2.c
deleted file mode 100644
index 8cced35009bd..000000000000
--- a/arch/arm/plat-mxc/audmux-v2.c
+++ /dev/null
@@ -1,219 +0,0 @@
1/*
2 * Copyright 2009 Pengutronix, Sascha Hauer <s.hauer@pengutronix.de>
3 *
4 * Initial development of this code was funded by
5 * Phytec Messtechnik GmbH, http://www.phytec.de
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; either version 2 of the License, or
10 * (at your option) any later version.
11 *
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
16 */
17
18#include <linux/module.h>
19#include <linux/err.h>
20#include <linux/io.h>
21#include <linux/clk.h>
22#include <linux/debugfs.h>
23#include <linux/slab.h>
24#include <mach/audmux.h>
25#include <mach/hardware.h>
26
27static struct clk *audmux_clk;
28static void __iomem *audmux_base;
29
30#define MXC_AUDMUX_V2_PTCR(x) ((x) * 8)
31#define MXC_AUDMUX_V2_PDCR(x) ((x) * 8 + 4)
32
33#ifdef CONFIG_DEBUG_FS
34static struct dentry *audmux_debugfs_root;
35
36static int audmux_open_file(struct inode *inode, struct file *file)
37{
38 file->private_data = inode->i_private;
39 return 0;
40}
41
42/* There is an annoying discontinuity in the SSI numbering with regard
43 * to the Linux number of the devices */
44static const char *audmux_port_string(int port)
45{
46 switch (port) {
47 case MX31_AUDMUX_PORT1_SSI0:
48 return "imx-ssi.0";
49 case MX31_AUDMUX_PORT2_SSI1:
50 return "imx-ssi.1";
51 case MX31_AUDMUX_PORT3_SSI_PINS_3:
52 return "SSI3";
53 case MX31_AUDMUX_PORT4_SSI_PINS_4:
54 return "SSI4";
55 case MX31_AUDMUX_PORT5_SSI_PINS_5:
56 return "SSI5";
57 case MX31_AUDMUX_PORT6_SSI_PINS_6:
58 return "SSI6";
59 default:
60 return "UNKNOWN";
61 }
62}
63
64static ssize_t audmux_read_file(struct file *file, char __user *user_buf,
65 size_t count, loff_t *ppos)
66{
67 ssize_t ret;
68 char *buf = kmalloc(PAGE_SIZE, GFP_KERNEL);
69 int port = (int)file->private_data;
70 u32 pdcr, ptcr;
71
72 if (!buf)
73 return -ENOMEM;
74
75 if (audmux_clk)
76 clk_enable(audmux_clk);
77
78 ptcr = readl(audmux_base + MXC_AUDMUX_V2_PTCR(port));
79 pdcr = readl(audmux_base + MXC_AUDMUX_V2_PDCR(port));
80
81 if (audmux_clk)
82 clk_disable(audmux_clk);
83
84 ret = snprintf(buf, PAGE_SIZE, "PDCR: %08x\nPTCR: %08x\n",
85 pdcr, ptcr);
86
87 if (ptcr & MXC_AUDMUX_V2_PTCR_TFSDIR)
88 ret += snprintf(buf + ret, PAGE_SIZE - ret,
89 "TxFS output from %s, ",
90 audmux_port_string((ptcr >> 27) & 0x7));
91 else
92 ret += snprintf(buf + ret, PAGE_SIZE - ret,
93 "TxFS input, ");
94
95 if (ptcr & MXC_AUDMUX_V2_PTCR_TCLKDIR)
96 ret += snprintf(buf + ret, PAGE_SIZE - ret,
97 "TxClk output from %s",
98 audmux_port_string((ptcr >> 22) & 0x7));
99 else
100 ret += snprintf(buf + ret, PAGE_SIZE - ret,
101 "TxClk input");
102
103 ret += snprintf(buf + ret, PAGE_SIZE - ret, "\n");
104
105 if (ptcr & MXC_AUDMUX_V2_PTCR_SYN) {
106 ret += snprintf(buf + ret, PAGE_SIZE - ret,
107 "Port is symmetric");
108 } else {
109 if (ptcr & MXC_AUDMUX_V2_PTCR_RFSDIR)
110 ret += snprintf(buf + ret, PAGE_SIZE - ret,
111 "RxFS output from %s, ",
112 audmux_port_string((ptcr >> 17) & 0x7));
113 else
114 ret += snprintf(buf + ret, PAGE_SIZE - ret,
115 "RxFS input, ");
116
117 if (ptcr & MXC_AUDMUX_V2_PTCR_RCLKDIR)
118 ret += snprintf(buf + ret, PAGE_SIZE - ret,
119 "RxClk output from %s",
120 audmux_port_string((ptcr >> 12) & 0x7));
121 else
122 ret += snprintf(buf + ret, PAGE_SIZE - ret,
123 "RxClk input");
124 }
125
126 ret += snprintf(buf + ret, PAGE_SIZE - ret,
127 "\nData received from %s\n",
128 audmux_port_string((pdcr >> 13) & 0x7));
129
130 ret = simple_read_from_buffer(user_buf, count, ppos, buf, ret);
131
132 kfree(buf);
133
134 return ret;
135}
136
137static const struct file_operations audmux_debugfs_fops = {
138 .open = audmux_open_file,
139 .read = audmux_read_file,
140 .llseek = default_llseek,
141};
142
143static void audmux_debugfs_init(void)
144{
145 int i;
146 char buf[20];
147
148 audmux_debugfs_root = debugfs_create_dir("audmux", NULL);
149 if (!audmux_debugfs_root) {
150 pr_warning("Failed to create AUDMUX debugfs root\n");
151 return;
152 }
153
154 for (i = 1; i < 8; i++) {
155 snprintf(buf, sizeof(buf), "ssi%d", i);
156 if (!debugfs_create_file(buf, 0444, audmux_debugfs_root,
157 (void *)i, &audmux_debugfs_fops))
158 pr_warning("Failed to create AUDMUX port %d debugfs file\n",
159 i);
160 }
161}
162#else
163static inline void audmux_debugfs_init(void)
164{
165}
166#endif
167
168int mxc_audmux_v2_configure_port(unsigned int port, unsigned int ptcr,
169 unsigned int pdcr)
170{
171 if (!audmux_base)
172 return -ENOSYS;
173
174 if (audmux_clk)
175 clk_enable(audmux_clk);
176
177 writel(ptcr, audmux_base + MXC_AUDMUX_V2_PTCR(port));
178 writel(pdcr, audmux_base + MXC_AUDMUX_V2_PDCR(port));
179
180 if (audmux_clk)
181 clk_disable(audmux_clk);
182
183 return 0;
184}
185EXPORT_SYMBOL_GPL(mxc_audmux_v2_configure_port);
186
187static int mxc_audmux_v2_init(void)
188{
189 int ret;
190 if (cpu_is_mx51()) {
191 audmux_base = MX51_IO_ADDRESS(MX51_AUDMUX_BASE_ADDR);
192 } else if (cpu_is_mx31()) {
193 audmux_base = MX31_IO_ADDRESS(MX31_AUDMUX_BASE_ADDR);
194 } else if (cpu_is_mx35()) {
195 audmux_clk = clk_get(NULL, "audmux");
196 if (IS_ERR(audmux_clk)) {
197 ret = PTR_ERR(audmux_clk);
198 printk(KERN_ERR "%s: cannot get clock: %d\n", __func__,
199 ret);
200 return ret;
201 }
202 audmux_base = MX35_IO_ADDRESS(MX35_AUDMUX_BASE_ADDR);
203 } else if (cpu_is_mx25()) {
204 audmux_clk = clk_get(NULL, "audmux");
205 if (IS_ERR(audmux_clk)) {
206 ret = PTR_ERR(audmux_clk);
207 printk(KERN_ERR "%s: cannot get clock: %d\n", __func__,
208 ret);
209 return ret;
210 }
211 audmux_base = MX25_IO_ADDRESS(MX25_AUDMUX_BASE_ADDR);
212 }
213
214 audmux_debugfs_init();
215
216 return 0;
217}
218
219postcore_initcall(mxc_audmux_v2_init);
diff --git a/arch/arm/plat-mxc/avic.c b/arch/arm/plat-mxc/avic.c
index 55f15699a383..689f81f9593b 100644
--- a/arch/arm/plat-mxc/avic.c
+++ b/arch/arm/plat-mxc/avic.c
@@ -60,7 +60,7 @@ static int avic_irq_set_priority(unsigned char irq, unsigned char prio)
60 unsigned int mask = 0x0F << irq % 8 * 4; 60 unsigned int mask = 0x0F << irq % 8 * 4;
61 61
62 if (irq >= AVIC_NUM_IRQS) 62 if (irq >= AVIC_NUM_IRQS)
63 return -EINVAL;; 63 return -EINVAL;
64 64
65 temp = __raw_readl(avic_base + AVIC_NIPRIORITY(irq / 8)); 65 temp = __raw_readl(avic_base + AVIC_NIPRIORITY(irq / 8));
66 temp &= ~mask; 66 temp &= ~mask;
diff --git a/arch/arm/plat-mxc/devices/platform-mx2-camera.c b/arch/arm/plat-mxc/devices/platform-mx2-camera.c
index b3f4828dc447..11eace953a09 100644
--- a/arch/arm/plat-mxc/devices/platform-mx2-camera.c
+++ b/arch/arm/plat-mxc/devices/platform-mx2-camera.c
@@ -62,3 +62,21 @@ struct platform_device *__init imx_add_mx2_camera(
62 res, data->iobaseemmaprp ? 4 : 2, 62 res, data->iobaseemmaprp ? 4 : 2,
63 pdata, sizeof(*pdata), DMA_BIT_MASK(32)); 63 pdata, sizeof(*pdata), DMA_BIT_MASK(32));
64} 64}
65
66struct platform_device *__init imx_add_mx2_emmaprp(
67 const struct imx_mx2_camera_data *data)
68{
69 struct resource res[] = {
70 {
71 .start = data->iobaseemmaprp,
72 .end = data->iobaseemmaprp + data->iosizeemmaprp - 1,
73 .flags = IORESOURCE_MEM,
74 }, {
75 .start = data->irqemmaprp,
76 .end = data->irqemmaprp,
77 .flags = IORESOURCE_IRQ,
78 },
79 };
80 return imx_add_platform_device_dmamask("m2m-emmaprp", 0,
81 res, 2, NULL, 0, DMA_BIT_MASK(32));
82}
diff --git a/arch/arm/plat-mxc/include/mach/audmux.h b/arch/arm/plat-mxc/include/mach/audmux.h
deleted file mode 100644
index 6fda788ed0e9..000000000000
--- a/arch/arm/plat-mxc/include/mach/audmux.h
+++ /dev/null
@@ -1,60 +0,0 @@
1#ifndef __MACH_AUDMUX_H
2#define __MACH_AUDMUX_H
3
4#define MX27_AUDMUX_HPCR1_SSI0 0
5#define MX27_AUDMUX_HPCR2_SSI1 1
6#define MX27_AUDMUX_HPCR3_SSI_PINS_4 2
7#define MX27_AUDMUX_PPCR1_SSI_PINS_1 3
8#define MX27_AUDMUX_PPCR2_SSI_PINS_2 4
9#define MX27_AUDMUX_PPCR3_SSI_PINS_3 5
10
11#define MX31_AUDMUX_PORT1_SSI0 0
12#define MX31_AUDMUX_PORT2_SSI1 1
13#define MX31_AUDMUX_PORT3_SSI_PINS_3 2
14#define MX31_AUDMUX_PORT4_SSI_PINS_4 3
15#define MX31_AUDMUX_PORT5_SSI_PINS_5 4
16#define MX31_AUDMUX_PORT6_SSI_PINS_6 5
17
18#define MX51_AUDMUX_PORT1_SSI0 0
19#define MX51_AUDMUX_PORT2_SSI1 1
20#define MX51_AUDMUX_PORT3 2
21#define MX51_AUDMUX_PORT4 3
22#define MX51_AUDMUX_PORT5 4
23#define MX51_AUDMUX_PORT6 5
24#define MX51_AUDMUX_PORT7 6
25
26/* Register definitions for the i.MX21/27 Digital Audio Multiplexer */
27#define MXC_AUDMUX_V1_PCR_INMMASK(x) ((x) & 0xff)
28#define MXC_AUDMUX_V1_PCR_INMEN (1 << 8)
29#define MXC_AUDMUX_V1_PCR_TXRXEN (1 << 10)
30#define MXC_AUDMUX_V1_PCR_SYN (1 << 12)
31#define MXC_AUDMUX_V1_PCR_RXDSEL(x) (((x) & 0x7) << 13)
32#define MXC_AUDMUX_V1_PCR_RFCSEL(x) (((x) & 0xf) << 20)
33#define MXC_AUDMUX_V1_PCR_RCLKDIR (1 << 24)
34#define MXC_AUDMUX_V1_PCR_RFSDIR (1 << 25)
35#define MXC_AUDMUX_V1_PCR_TFCSEL(x) (((x) & 0xf) << 26)
36#define MXC_AUDMUX_V1_PCR_TCLKDIR (1 << 30)
37#define MXC_AUDMUX_V1_PCR_TFSDIR (1 << 31)
38
39/* Register definitions for the i.MX25/31/35/51 Digital Audio Multiplexer */
40#define MXC_AUDMUX_V2_PTCR_TFSDIR (1 << 31)
41#define MXC_AUDMUX_V2_PTCR_TFSEL(x) (((x) & 0xf) << 27)
42#define MXC_AUDMUX_V2_PTCR_TCLKDIR (1 << 26)
43#define MXC_AUDMUX_V2_PTCR_TCSEL(x) (((x) & 0xf) << 22)
44#define MXC_AUDMUX_V2_PTCR_RFSDIR (1 << 21)
45#define MXC_AUDMUX_V2_PTCR_RFSEL(x) (((x) & 0xf) << 17)
46#define MXC_AUDMUX_V2_PTCR_RCLKDIR (1 << 16)
47#define MXC_AUDMUX_V2_PTCR_RCSEL(x) (((x) & 0xf) << 12)
48#define MXC_AUDMUX_V2_PTCR_SYN (1 << 11)
49
50#define MXC_AUDMUX_V2_PDCR_RXDSEL(x) (((x) & 0x7) << 13)
51#define MXC_AUDMUX_V2_PDCR_TXRXEN (1 << 12)
52#define MXC_AUDMUX_V2_PDCR_MODE(x) (((x) & 0x3) << 8)
53#define MXC_AUDMUX_V2_PDCR_INMMASK(x) ((x) & 0xff)
54
55int mxc_audmux_v1_configure_port(unsigned int port, unsigned int pcr);
56
57int mxc_audmux_v2_configure_port(unsigned int port, unsigned int ptcr,
58 unsigned int pdcr);
59
60#endif /* __MACH_AUDMUX_H */
diff --git a/arch/arm/plat-mxc/include/mach/devices-common.h b/arch/arm/plat-mxc/include/mach/devices-common.h
index def9ba53e23a..1b2258daa05b 100644
--- a/arch/arm/plat-mxc/include/mach/devices-common.h
+++ b/arch/arm/plat-mxc/include/mach/devices-common.h
@@ -223,6 +223,8 @@ struct imx_mx2_camera_data {
223struct platform_device *__init imx_add_mx2_camera( 223struct platform_device *__init imx_add_mx2_camera(
224 const struct imx_mx2_camera_data *data, 224 const struct imx_mx2_camera_data *data,
225 const struct mx2_camera_platform_data *pdata); 225 const struct mx2_camera_platform_data *pdata);
226struct platform_device *__init imx_add_mx2_emmaprp(
227 const struct imx_mx2_camera_data *data);
226 228
227#include <mach/mxc_ehci.h> 229#include <mach/mxc_ehci.h>
228struct imx_mxc_ehci_data { 230struct imx_mxc_ehci_data {
diff --git a/arch/arm/plat-mxc/include/mach/entry-macro.S b/arch/arm/plat-mxc/include/mach/entry-macro.S
deleted file mode 100644
index def5d30cb67e..000000000000
--- a/arch/arm/plat-mxc/include/mach/entry-macro.S
+++ /dev/null
@@ -1,16 +0,0 @@
1/*
2 * Copyright (C) 2007 Lennert Buytenhek <buytenh@wantstofly.org>
3 * Copyright 2004-2009 Freescale Semiconductor, Inc. All Rights Reserved.
4 */
5
6/*
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 as
9 * published by the Free Software Foundation.
10 */
11
12 .macro disable_fiq
13 .endm
14
15 .macro arch_ret_to_user, tmp1, tmp2
16 .endm
diff --git a/arch/arm/plat-mxc/include/mach/iomux-mx25.h b/arch/arm/plat-mxc/include/mach/iomux-mx25.h
index f0726d48df22..c61ec0fc10d4 100644
--- a/arch/arm/plat-mxc/include/mach/iomux-mx25.h
+++ b/arch/arm/plat-mxc/include/mach/iomux-mx25.h
@@ -139,15 +139,15 @@
139#define MX25_PAD_NFRB__GPIO_3_31 IOMUX_PAD(0x27c, 0x084, 0x15, 0, 0, NO_PAD_CTRL) 139#define MX25_PAD_NFRB__GPIO_3_31 IOMUX_PAD(0x27c, 0x084, 0x15, 0, 0, NO_PAD_CTRL)
140 140
141#define MX25_PAD_D15__D15 IOMUX_PAD(0x280, 0x088, 0x00, 0, 0, NO_PAD_CTRL) 141#define MX25_PAD_D15__D15 IOMUX_PAD(0x280, 0x088, 0x00, 0, 0, NO_PAD_CTRL)
142#define MX25_PAD_D15__LD16 IOMUX_PAD(0x280, 0x088, 0x01, 0, 0, NO_PAD_CTRL) 142#define MX25_PAD_D15__LD16 IOMUX_PAD(0x280, 0x088, 0x01, 0, 0, PAD_CTL_SRE_FAST)
143#define MX25_PAD_D15__GPIO_4_5 IOMUX_PAD(0x280, 0x088, 0x05, 0, 0, NO_PAD_CTRL) 143#define MX25_PAD_D15__GPIO_4_5 IOMUX_PAD(0x280, 0x088, 0x05, 0, 0, NO_PAD_CTRL)
144 144
145#define MX25_PAD_D14__D14 IOMUX_PAD(0x284, 0x08c, 0x00, 0, 0, NO_PAD_CTRL) 145#define MX25_PAD_D14__D14 IOMUX_PAD(0x284, 0x08c, 0x00, 0, 0, NO_PAD_CTRL)
146#define MX25_PAD_D14__LD17 IOMUX_PAD(0x284, 0x08c, 0x01, 0, 0, NO_PAD_CTRL) 146#define MX25_PAD_D14__LD17 IOMUX_PAD(0x284, 0x08c, 0x01, 0, 0, PAD_CTL_SRE_FAST)
147#define MX25_PAD_D14__GPIO_4_6 IOMUX_PAD(0x284, 0x08c, 0x05, 0, 0, NO_PAD_CTRL) 147#define MX25_PAD_D14__GPIO_4_6 IOMUX_PAD(0x284, 0x08c, 0x05, 0, 0, NO_PAD_CTRL)
148 148
149#define MX25_PAD_D13__D13 IOMUX_PAD(0x288, 0x090, 0x00, 0, 0, NO_PAD_CTRL) 149#define MX25_PAD_D13__D13 IOMUX_PAD(0x288, 0x090, 0x00, 0, 0, NO_PAD_CTRL)
150#define MX25_PAD_D13__LD18 IOMUX_PAD(0x288, 0x090, 0x01, 0, 0, NO_PAD_CTRL) 150#define MX25_PAD_D13__LD18 IOMUX_PAD(0x288, 0x090, 0x01, 0, 0, PAD_CTL_SRE_FAST)
151#define MX25_PAD_D13__GPIO_4_7 IOMUX_PAD(0x288, 0x090, 0x05, 0, 0, NO_PAD_CTRL) 151#define MX25_PAD_D13__GPIO_4_7 IOMUX_PAD(0x288, 0x090, 0x05, 0, 0, NO_PAD_CTRL)
152 152
153#define MX25_PAD_D12__D12 IOMUX_PAD(0x28c, 0x094, 0x00, 0, 0, NO_PAD_CTRL) 153#define MX25_PAD_D12__D12 IOMUX_PAD(0x28c, 0x094, 0x00, 0, 0, NO_PAD_CTRL)
@@ -192,54 +192,54 @@
192#define MX25_PAD_D0__D0 IOMUX_PAD(0x2bc, 0x0c4, 0x00, 0, 0, NO_PAD_CTRL) 192#define MX25_PAD_D0__D0 IOMUX_PAD(0x2bc, 0x0c4, 0x00, 0, 0, NO_PAD_CTRL)
193#define MX25_PAD_D0__GPIO_4_20 IOMUX_PAD(0x2bc, 0x0c4, 0x05, 0, 0, NO_PAD_CTRL) 193#define MX25_PAD_D0__GPIO_4_20 IOMUX_PAD(0x2bc, 0x0c4, 0x05, 0, 0, NO_PAD_CTRL)
194 194
195#define MX25_PAD_LD0__LD0 IOMUX_PAD(0x2c0, 0x0c8, 0x10, 0, 0, NO_PAD_CTRL) 195#define MX25_PAD_LD0__LD0 IOMUX_PAD(0x2c0, 0x0c8, 0x10, 0, 0, PAD_CTL_SRE_FAST)
196#define MX25_PAD_LD0__CSI_D0 IOMUX_PAD(0x2c0, 0x0c8, 0x12, 0x488, 0, NO_PAD_CTRL) 196#define MX25_PAD_LD0__CSI_D0 IOMUX_PAD(0x2c0, 0x0c8, 0x12, 0x488, 0, NO_PAD_CTRL)
197#define MX25_PAD_LD0__GPIO_2_15 IOMUX_PAD(0x2c0, 0x0c8, 0x15, 0, 0, NO_PAD_CTRL) 197#define MX25_PAD_LD0__GPIO_2_15 IOMUX_PAD(0x2c0, 0x0c8, 0x15, 0, 0, NO_PAD_CTRL)
198 198
199#define MX25_PAD_LD1__LD1 IOMUX_PAD(0x2c4, 0x0cc, 0x10, 0, 0, NO_PAD_CTRL) 199#define MX25_PAD_LD1__LD1 IOMUX_PAD(0x2c4, 0x0cc, 0x10, 0, 0, PAD_CTL_SRE_FAST)
200#define MX25_PAD_LD1__CSI_D1 IOMUX_PAD(0x2c4, 0x0cc, 0x12, 0x48c, 0, NO_PAD_CTRL) 200#define MX25_PAD_LD1__CSI_D1 IOMUX_PAD(0x2c4, 0x0cc, 0x12, 0x48c, 0, NO_PAD_CTRL)
201#define MX25_PAD_LD1__GPIO_2_16 IOMUX_PAD(0x2c4, 0x0cc, 0x15, 0, 0, NO_PAD_CTRL) 201#define MX25_PAD_LD1__GPIO_2_16 IOMUX_PAD(0x2c4, 0x0cc, 0x15, 0, 0, NO_PAD_CTRL)
202 202
203#define MX25_PAD_LD2__LD2 IOMUX_PAD(0x2c8, 0x0d0, 0x10, 0, 0, NO_PAD_CTRL) 203#define MX25_PAD_LD2__LD2 IOMUX_PAD(0x2c8, 0x0d0, 0x10, 0, 0, PAD_CTL_SRE_FAST)
204#define MX25_PAD_LD2__GPIO_2_17 IOMUX_PAD(0x2c8, 0x0d0, 0x15, 0, 0, NO_PAD_CTRL) 204#define MX25_PAD_LD2__GPIO_2_17 IOMUX_PAD(0x2c8, 0x0d0, 0x15, 0, 0, NO_PAD_CTRL)
205 205
206#define MX25_PAD_LD3__LD3 IOMUX_PAD(0x2cc, 0x0d4, 0x10, 0, 0, NO_PAD_CTRL) 206#define MX25_PAD_LD3__LD3 IOMUX_PAD(0x2cc, 0x0d4, 0x10, 0, 0, PAD_CTL_SRE_FAST)
207#define MX25_PAD_LD3__GPIO_2_18 IOMUX_PAD(0x2cc, 0x0d4, 0x15, 0, 0, NO_PAD_CTRL) 207#define MX25_PAD_LD3__GPIO_2_18 IOMUX_PAD(0x2cc, 0x0d4, 0x15, 0, 0, NO_PAD_CTRL)
208 208
209#define MX25_PAD_LD4__LD4 IOMUX_PAD(0x2d0, 0x0d8, 0x10, 0, 0, NO_PAD_CTRL) 209#define MX25_PAD_LD4__LD4 IOMUX_PAD(0x2d0, 0x0d8, 0x10, 0, 0, PAD_CTL_SRE_FAST)
210#define MX25_PAD_LD4__GPIO_2_19 IOMUX_PAD(0x2d0, 0x0d8, 0x15, 0, 0, NO_PAD_CTRL) 210#define MX25_PAD_LD4__GPIO_2_19 IOMUX_PAD(0x2d0, 0x0d8, 0x15, 0, 0, NO_PAD_CTRL)
211 211
212#define MX25_PAD_LD5__LD5 IOMUX_PAD(0x2d4, 0x0dc, 0x10, 0, 0, NO_PAD_CTRL) 212#define MX25_PAD_LD5__LD5 IOMUX_PAD(0x2d4, 0x0dc, 0x10, 0, 0, PAD_CTL_SRE_FAST)
213#define MX25_PAD_LD5__GPIO_1_19 IOMUX_PAD(0x2d4, 0x0dc, 0x15, 0, 0, NO_PAD_CTRL) 213#define MX25_PAD_LD5__GPIO_1_19 IOMUX_PAD(0x2d4, 0x0dc, 0x15, 0, 0, NO_PAD_CTRL)
214 214
215#define MX25_PAD_LD6__LD6 IOMUX_PAD(0x2d8, 0x0e0, 0x10, 0, 0, NO_PAD_CTRL) 215#define MX25_PAD_LD6__LD6 IOMUX_PAD(0x2d8, 0x0e0, 0x10, 0, 0, PAD_CTL_SRE_FAST)
216#define MX25_PAD_LD6__GPIO_1_20 IOMUX_PAD(0x2d8, 0x0e0, 0x15, 0, 0, NO_PAD_CTRL) 216#define MX25_PAD_LD6__GPIO_1_20 IOMUX_PAD(0x2d8, 0x0e0, 0x15, 0, 0, NO_PAD_CTRL)
217 217
218#define MX25_PAD_LD7__LD7 IOMUX_PAD(0x2dc, 0x0e4, 0x10, 0, 0, NO_PAD_CTRL) 218#define MX25_PAD_LD7__LD7 IOMUX_PAD(0x2dc, 0x0e4, 0x10, 0, 0, PAD_CTL_SRE_FAST)
219#define MX25_PAD_LD7__GPIO_1_21 IOMUX_PAD(0x2dc, 0x0e4, 0x15, 0, 0, NO_PAD_CTRL) 219#define MX25_PAD_LD7__GPIO_1_21 IOMUX_PAD(0x2dc, 0x0e4, 0x15, 0, 0, NO_PAD_CTRL)
220 220
221#define MX25_PAD_LD8__LD8 IOMUX_PAD(0x2e0, 0x0e8, 0x10, 0, 0, NO_PAD_CTRL) 221#define MX25_PAD_LD8__LD8 IOMUX_PAD(0x2e0, 0x0e8, 0x10, 0, 0, PAD_CTL_SRE_FAST)
222#define MX25_PAD_LD8__FEC_TX_ERR IOMUX_PAD(0x2e0, 0x0e8, 0x15, 0, 0, NO_PAD_CTRL) 222#define MX25_PAD_LD8__FEC_TX_ERR IOMUX_PAD(0x2e0, 0x0e8, 0x15, 0, 0, NO_PAD_CTRL)
223 223
224#define MX25_PAD_LD9__LD9 IOMUX_PAD(0x2e4, 0x0ec, 0x10, 0, 0, NO_PAD_CTRL) 224#define MX25_PAD_LD9__LD9 IOMUX_PAD(0x2e4, 0x0ec, 0x10, 0, 0, PAD_CTL_SRE_FAST)
225#define MX25_PAD_LD9__FEC_COL IOMUX_PAD(0x2e4, 0x0ec, 0x15, 0x504, 1, NO_PAD_CTRL) 225#define MX25_PAD_LD9__FEC_COL IOMUX_PAD(0x2e4, 0x0ec, 0x15, 0x504, 1, NO_PAD_CTRL)
226 226
227#define MX25_PAD_LD10__LD10 IOMUX_PAD(0x2e8, 0x0f0, 0x10, 0, 0, NO_PAD_CTRL) 227#define MX25_PAD_LD10__LD10 IOMUX_PAD(0x2e8, 0x0f0, 0x10, 0, 0, PAD_CTL_SRE_FAST)
228#define MX25_PAD_LD10__FEC_RX_ER IOMUX_PAD(0x2e8, 0x0f0, 0x15, 0x518, 1, NO_PAD_CTRL) 228#define MX25_PAD_LD10__FEC_RX_ER IOMUX_PAD(0x2e8, 0x0f0, 0x15, 0x518, 1, NO_PAD_CTRL)
229 229
230#define MX25_PAD_LD11__LD11 IOMUX_PAD(0x2ec, 0x0f4, 0x10, 0, 0, NO_PAD_CTRL) 230#define MX25_PAD_LD11__LD11 IOMUX_PAD(0x2ec, 0x0f4, 0x10, 0, 0, PAD_CTL_SRE_FAST)
231#define MX25_PAD_LD11__FEC_RDATA2 IOMUX_PAD(0x2ec, 0x0f4, 0x15, 0x50c, 1, NO_PAD_CTRL) 231#define MX25_PAD_LD11__FEC_RDATA2 IOMUX_PAD(0x2ec, 0x0f4, 0x15, 0x50c, 1, NO_PAD_CTRL)
232 232
233#define MX25_PAD_LD12__LD12 IOMUX_PAD(0x2f0, 0x0f8, 0x10, 0, 0, NO_PAD_CTRL) 233#define MX25_PAD_LD12__LD12 IOMUX_PAD(0x2f0, 0x0f8, 0x10, 0, 0, PAD_CTL_SRE_FAST)
234#define MX25_PAD_LD12__FEC_RDATA3 IOMUX_PAD(0x2f0, 0x0f8, 0x15, 0x510, 1, NO_PAD_CTRL) 234#define MX25_PAD_LD12__FEC_RDATA3 IOMUX_PAD(0x2f0, 0x0f8, 0x15, 0x510, 1, NO_PAD_CTRL)
235 235
236#define MX25_PAD_LD13__LD13 IOMUX_PAD(0x2f4, 0x0fc, 0x10, 0, 0, NO_PAD_CTRL) 236#define MX25_PAD_LD13__LD13 IOMUX_PAD(0x2f4, 0x0fc, 0x10, 0, 0, PAD_CTL_SRE_FAST)
237#define MX25_PAD_LD13__FEC_TDATA2 IOMUX_PAD(0x2f4, 0x0fc, 0x15, 0, 0, NO_PAD_CTRL) 237#define MX25_PAD_LD13__FEC_TDATA2 IOMUX_PAD(0x2f4, 0x0fc, 0x15, 0, 0, NO_PAD_CTRL)
238 238
239#define MX25_PAD_LD14__LD14 IOMUX_PAD(0x2f8, 0x100, 0x10, 0, 0, NO_PAD_CTRL) 239#define MX25_PAD_LD14__LD14 IOMUX_PAD(0x2f8, 0x100, 0x10, 0, 0, PAD_CTL_SRE_FAST)
240#define MX25_PAD_LD14__FEC_TDATA3 IOMUX_PAD(0x2f8, 0x100, 0x15, 0, 0, NO_PAD_CTRL) 240#define MX25_PAD_LD14__FEC_TDATA3 IOMUX_PAD(0x2f8, 0x100, 0x15, 0, 0, NO_PAD_CTRL)
241 241
242#define MX25_PAD_LD15__LD15 IOMUX_PAD(0x2fc, 0x104, 0x10, 0, 0, NO_PAD_CTRL) 242#define MX25_PAD_LD15__LD15 IOMUX_PAD(0x2fc, 0x104, 0x10, 0, 0, PAD_CTL_SRE_FAST)
243#define MX25_PAD_LD15__FEC_RX_CLK IOMUX_PAD(0x2fc, 0x104, 0x15, 0x514, 1, NO_PAD_CTRL) 243#define MX25_PAD_LD15__FEC_RX_CLK IOMUX_PAD(0x2fc, 0x104, 0x15, 0x514, 1, NO_PAD_CTRL)
244 244
245#define MX25_PAD_HSYNC__HSYNC IOMUX_PAD(0x300, 0x108, 0x10, 0, 0, NO_PAD_CTRL) 245#define MX25_PAD_HSYNC__HSYNC IOMUX_PAD(0x300, 0x108, 0x10, 0, 0, NO_PAD_CTRL)
@@ -468,11 +468,11 @@
468#define MX25_PAD_GPIO_C__CAN2_TX IOMUX_PAD(0x3f8, 0x1fc, 0x16, 0, 0, PAD_CTL_PUS_22K_UP) 468#define MX25_PAD_GPIO_C__CAN2_TX IOMUX_PAD(0x3f8, 0x1fc, 0x16, 0, 0, PAD_CTL_PUS_22K_UP)
469 469
470#define MX25_PAD_GPIO_D__GPIO_D IOMUX_PAD(0x3fc, 0x200, 0x10, 0, 0, NO_PAD_CTRL) 470#define MX25_PAD_GPIO_D__GPIO_D IOMUX_PAD(0x3fc, 0x200, 0x10, 0, 0, NO_PAD_CTRL)
471#define MX25_PAD_GPIO_E__LD16 IOMUX_PAD(0x400, 0x204, 0x02, 0, 0, NO_PAD_CTRL) 471#define MX25_PAD_GPIO_E__LD16 IOMUX_PAD(0x400, 0x204, 0x02, 0, 0, PAD_CTL_SRE_FAST)
472#define MX25_PAD_GPIO_D__CAN2_RX IOMUX_PAD(0x3fc, 0x200, 0x16, 0x484, 1, PAD_CTL_PUS_22K_UP) 472#define MX25_PAD_GPIO_D__CAN2_RX IOMUX_PAD(0x3fc, 0x200, 0x16, 0x484, 1, PAD_CTL_PUS_22K_UP)
473 473
474#define MX25_PAD_GPIO_E__GPIO_E IOMUX_PAD(0x400, 0x204, 0x10, 0, 0, NO_PAD_CTRL) 474#define MX25_PAD_GPIO_E__GPIO_E IOMUX_PAD(0x400, 0x204, 0x10, 0, 0, NO_PAD_CTRL)
475#define MX25_PAD_GPIO_F__LD17 IOMUX_PAD(0x404, 0x208, 0x02, 0, 0, NO_PAD_CTRL) 475#define MX25_PAD_GPIO_F__LD17 IOMUX_PAD(0x404, 0x208, 0x02, 0, 0, PAD_CTL_SRE_FAST)
476#define MX25_PAD_GPIO_E__AUD7_TXD IOMUX_PAD(0x400, 0x204, 0x14, 0, 0, NO_PAD_CTRL) 476#define MX25_PAD_GPIO_E__AUD7_TXD IOMUX_PAD(0x400, 0x204, 0x14, 0, 0, NO_PAD_CTRL)
477 477
478#define MX25_PAD_GPIO_F__GPIO_F IOMUX_PAD(0x404, 0x208, 0x10, 0, 0, NO_PAD_CTRL) 478#define MX25_PAD_GPIO_F__GPIO_F IOMUX_PAD(0x404, 0x208, 0x10, 0, 0, NO_PAD_CTRL)
diff --git a/arch/arm/plat-mxc/include/mach/mxc_ehci.h b/arch/arm/plat-mxc/include/mach/mxc_ehci.h
index 2c159dc2398b..9ffd1bbe615f 100644
--- a/arch/arm/plat-mxc/include/mach/mxc_ehci.h
+++ b/arch/arm/plat-mxc/include/mach/mxc_ehci.h
@@ -44,7 +44,7 @@ struct mxc_usbh_platform_data {
44 int (*exit)(struct platform_device *pdev); 44 int (*exit)(struct platform_device *pdev);
45 45
46 unsigned int portsc; 46 unsigned int portsc;
47 struct otg_transceiver *otg; 47 struct usb_phy *otg;
48}; 48};
49 49
50int mx51_initialize_usb_hw(int port, unsigned int flags); 50int mx51_initialize_usb_hw(int port, unsigned int flags);
diff --git a/arch/arm/plat-mxc/include/mach/ulpi.h b/arch/arm/plat-mxc/include/mach/ulpi.h
index f9161c96d7bd..42bdaca6d7d9 100644
--- a/arch/arm/plat-mxc/include/mach/ulpi.h
+++ b/arch/arm/plat-mxc/include/mach/ulpi.h
@@ -2,15 +2,15 @@
2#define __MACH_ULPI_H 2#define __MACH_ULPI_H
3 3
4#ifdef CONFIG_USB_ULPI 4#ifdef CONFIG_USB_ULPI
5struct otg_transceiver *imx_otg_ulpi_create(unsigned int flags); 5struct usb_phy *imx_otg_ulpi_create(unsigned int flags);
6#else 6#else
7static inline struct otg_transceiver *imx_otg_ulpi_create(unsigned int flags) 7static inline struct usb_phy *imx_otg_ulpi_create(unsigned int flags)
8{ 8{
9 return NULL; 9 return NULL;
10} 10}
11#endif 11#endif
12 12
13extern struct otg_io_access_ops mxc_ulpi_access_ops; 13extern struct usb_phy_io_ops mxc_ulpi_access_ops;
14 14
15#endif /* __MACH_ULPI_H */ 15#endif /* __MACH_ULPI_H */
16 16
diff --git a/arch/arm/plat-mxc/ulpi.c b/arch/arm/plat-mxc/ulpi.c
index 477e45bea1be..d2963427184f 100644
--- a/arch/arm/plat-mxc/ulpi.c
+++ b/arch/arm/plat-mxc/ulpi.c
@@ -58,7 +58,7 @@ static int ulpi_poll(void __iomem *view, u32 bit)
58 return -ETIMEDOUT; 58 return -ETIMEDOUT;
59} 59}
60 60
61static int ulpi_read(struct otg_transceiver *otg, u32 reg) 61static int ulpi_read(struct usb_phy *otg, u32 reg)
62{ 62{
63 int ret; 63 int ret;
64 void __iomem *view = otg->io_priv; 64 void __iomem *view = otg->io_priv;
@@ -84,7 +84,7 @@ static int ulpi_read(struct otg_transceiver *otg, u32 reg)
84 return (__raw_readl(view) >> ULPIVW_RDATA_SHIFT) & ULPIVW_RDATA_MASK; 84 return (__raw_readl(view) >> ULPIVW_RDATA_SHIFT) & ULPIVW_RDATA_MASK;
85} 85}
86 86
87static int ulpi_write(struct otg_transceiver *otg, u32 val, u32 reg) 87static int ulpi_write(struct usb_phy *otg, u32 val, u32 reg)
88{ 88{
89 int ret; 89 int ret;
90 void __iomem *view = otg->io_priv; 90 void __iomem *view = otg->io_priv;
@@ -106,13 +106,13 @@ static int ulpi_write(struct otg_transceiver *otg, u32 val, u32 reg)
106 return ulpi_poll(view, ULPIVW_RUN); 106 return ulpi_poll(view, ULPIVW_RUN);
107} 107}
108 108
109struct otg_io_access_ops mxc_ulpi_access_ops = { 109struct usb_phy_io_ops mxc_ulpi_access_ops = {
110 .read = ulpi_read, 110 .read = ulpi_read,
111 .write = ulpi_write, 111 .write = ulpi_write,
112}; 112};
113EXPORT_SYMBOL_GPL(mxc_ulpi_access_ops); 113EXPORT_SYMBOL_GPL(mxc_ulpi_access_ops);
114 114
115struct otg_transceiver *imx_otg_ulpi_create(unsigned int flags) 115struct usb_phy *imx_otg_ulpi_create(unsigned int flags)
116{ 116{
117 return otg_ulpi_create(&mxc_ulpi_access_ops, flags); 117 return otg_ulpi_create(&mxc_ulpi_access_ops, flags);
118} 118}