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-rw-r--r--arch/arm/plat-mxc/cpufreq.c1
-rw-r--r--arch/arm/plat-mxc/pwm.c7
2 files changed, 7 insertions, 1 deletions
diff --git a/arch/arm/plat-mxc/cpufreq.c b/arch/arm/plat-mxc/cpufreq.c
index 74aac96cda20..adbff706ef6f 100644
--- a/arch/arm/plat-mxc/cpufreq.c
+++ b/arch/arm/plat-mxc/cpufreq.c
@@ -17,6 +17,7 @@
17 * the CPU clock speed on the fly. 17 * the CPU clock speed on the fly.
18 */ 18 */
19 19
20#include <linux/module.h>
20#include <linux/cpufreq.h> 21#include <linux/cpufreq.h>
21#include <linux/clk.h> 22#include <linux/clk.h>
22#include <linux/err.h> 23#include <linux/err.h>
diff --git a/arch/arm/plat-mxc/pwm.c b/arch/arm/plat-mxc/pwm.c
index 42d74ea59084..845de59f07ed 100644
--- a/arch/arm/plat-mxc/pwm.c
+++ b/arch/arm/plat-mxc/pwm.c
@@ -32,6 +32,9 @@
32#define MX3_PWMSAR 0x0C /* PWM Sample Register */ 32#define MX3_PWMSAR 0x0C /* PWM Sample Register */
33#define MX3_PWMPR 0x10 /* PWM Period Register */ 33#define MX3_PWMPR 0x10 /* PWM Period Register */
34#define MX3_PWMCR_PRESCALER(x) (((x - 1) & 0xFFF) << 4) 34#define MX3_PWMCR_PRESCALER(x) (((x - 1) & 0xFFF) << 4)
35#define MX3_PWMCR_DOZEEN (1 << 24)
36#define MX3_PWMCR_WAITEN (1 << 23)
37#define MX3_PWMCR_DBGEN (1 << 22)
35#define MX3_PWMCR_CLKSRC_IPG_HIGH (2 << 16) 38#define MX3_PWMCR_CLKSRC_IPG_HIGH (2 << 16)
36#define MX3_PWMCR_CLKSRC_IPG (1 << 16) 39#define MX3_PWMCR_CLKSRC_IPG (1 << 16)
37#define MX3_PWMCR_EN (1 << 0) 40#define MX3_PWMCR_EN (1 << 0)
@@ -77,7 +80,9 @@ int pwm_config(struct pwm_device *pwm, int duty_ns, int period_ns)
77 writel(duty_cycles, pwm->mmio_base + MX3_PWMSAR); 80 writel(duty_cycles, pwm->mmio_base + MX3_PWMSAR);
78 writel(period_cycles, pwm->mmio_base + MX3_PWMPR); 81 writel(period_cycles, pwm->mmio_base + MX3_PWMPR);
79 82
80 cr = MX3_PWMCR_PRESCALER(prescale) | MX3_PWMCR_EN; 83 cr = MX3_PWMCR_PRESCALER(prescale) |
84 MX3_PWMCR_DOZEEN | MX3_PWMCR_WAITEN |
85 MX3_PWMCR_DBGEN | MX3_PWMCR_EN;
81 86
82 if (cpu_is_mx25()) 87 if (cpu_is_mx25())
83 cr |= MX3_PWMCR_CLKSRC_IPG; 88 cr |= MX3_PWMCR_CLKSRC_IPG;