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-rw-r--r--arch/arm/plat-mxc/include/mach/gpio.h6
-rw-r--r--arch/arm/plat-mxc/include/mach/iomux-v3.h10
2 files changed, 5 insertions, 11 deletions
diff --git a/arch/arm/plat-mxc/include/mach/gpio.h b/arch/arm/plat-mxc/include/mach/gpio.h
index 31c820c1b796..3e1ffc8b8f0c 100644
--- a/arch/arm/plat-mxc/include/mach/gpio.h
+++ b/arch/arm/plat-mxc/include/mach/gpio.h
@@ -21,18 +21,12 @@
21 21
22#include <linux/spinlock.h> 22#include <linux/spinlock.h>
23#include <mach/hardware.h> 23#include <mach/hardware.h>
24#include <asm-generic/gpio.h>
25 24
26 25
27/* There's a off-by-one betweem the gpio bank number and the gpiochip */ 26/* There's a off-by-one betweem the gpio bank number and the gpiochip */
28/* range e.g. GPIO_1_5 is gpio 5 under linux */ 27/* range e.g. GPIO_1_5 is gpio 5 under linux */
29#define IMX_GPIO_NR(bank, nr) (((bank) - 1) * 32 + (nr)) 28#define IMX_GPIO_NR(bank, nr) (((bank) - 1) * 32 + (nr))
30 29
31/* use gpiolib dispatchers */
32#define gpio_get_value __gpio_get_value
33#define gpio_set_value __gpio_set_value
34#define gpio_cansleep __gpio_cansleep
35
36#define gpio_to_irq(gpio) (MXC_GPIO_IRQ_START + (gpio)) 30#define gpio_to_irq(gpio) (MXC_GPIO_IRQ_START + (gpio))
37#define irq_to_gpio(irq) ((irq) - MXC_GPIO_IRQ_START) 31#define irq_to_gpio(irq) ((irq) - MXC_GPIO_IRQ_START)
38 32
diff --git a/arch/arm/plat-mxc/include/mach/iomux-v3.h b/arch/arm/plat-mxc/include/mach/iomux-v3.h
index ebbce33097a7..45099566fecc 100644
--- a/arch/arm/plat-mxc/include/mach/iomux-v3.h
+++ b/arch/arm/plat-mxc/include/mach/iomux-v3.h
@@ -89,11 +89,11 @@ typedef u64 iomux_v3_cfg_t;
89#define PAD_CTL_HYS (1 << 8) 89#define PAD_CTL_HYS (1 << 8)
90 90
91#define PAD_CTL_PKE (1 << 7) 91#define PAD_CTL_PKE (1 << 7)
92#define PAD_CTL_PUE (1 << 6) 92#define PAD_CTL_PUE (1 << 6 | PAD_CTL_PKE)
93#define PAD_CTL_PUS_100K_DOWN (0 << 4) 93#define PAD_CTL_PUS_100K_DOWN (0 << 4 | PAD_CTL_PUE)
94#define PAD_CTL_PUS_47K_UP (1 << 4) 94#define PAD_CTL_PUS_47K_UP (1 << 4 | PAD_CTL_PUE)
95#define PAD_CTL_PUS_100K_UP (2 << 4) 95#define PAD_CTL_PUS_100K_UP (2 << 4 | PAD_CTL_PUE)
96#define PAD_CTL_PUS_22K_UP (3 << 4) 96#define PAD_CTL_PUS_22K_UP (3 << 4 | PAD_CTL_PUE)
97 97
98#define PAD_CTL_ODE (1 << 3) 98#define PAD_CTL_ODE (1 << 3)
99 99