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-rw-r--r--arch/arm/plat-mxc/include/mach/common.h11
-rw-r--r--arch/arm/plat-mxc/include/mach/mxc.h7
-rw-r--r--arch/arm/plat-mxc/include/mach/system.h35
-rw-r--r--arch/arm/plat-mxc/system.c2
4 files changed, 16 insertions, 39 deletions
diff --git a/arch/arm/plat-mxc/include/mach/common.h b/arch/arm/plat-mxc/include/mach/common.h
index 4e3d97890d69..afaa96733c9b 100644
--- a/arch/arm/plat-mxc/include/mach/common.h
+++ b/arch/arm/plat-mxc/include/mach/common.h
@@ -72,4 +72,15 @@ extern void mxc_arch_reset_init(void __iomem *);
72extern void mx51_efikamx_reset(void); 72extern void mx51_efikamx_reset(void);
73extern int mx53_revision(void); 73extern int mx53_revision(void);
74extern int mx53_display_revision(void); 74extern int mx53_display_revision(void);
75
76enum mxc_cpu_pwr_mode {
77 WAIT_CLOCKED, /* wfi only */
78 WAIT_UNCLOCKED, /* WAIT */
79 WAIT_UNCLOCKED_POWER_OFF, /* WAIT + SRPG */
80 STOP_POWER_ON, /* just STOP */
81 STOP_POWER_OFF, /* STOP + SRPG */
82};
83
84extern void mx5_cpu_lp_set(enum mxc_cpu_pwr_mode mode);
85extern void (*imx_idle)(void);
75#endif 86#endif
diff --git a/arch/arm/plat-mxc/include/mach/mxc.h b/arch/arm/plat-mxc/include/mach/mxc.h
index 09879235a9f5..00a78193c681 100644
--- a/arch/arm/plat-mxc/include/mach/mxc.h
+++ b/arch/arm/plat-mxc/include/mach/mxc.h
@@ -183,13 +183,6 @@ struct cpu_op {
183}; 183};
184 184
185int tzic_enable_wake(int is_idle); 185int tzic_enable_wake(int is_idle);
186enum mxc_cpu_pwr_mode {
187 WAIT_CLOCKED, /* wfi only */
188 WAIT_UNCLOCKED, /* WAIT */
189 WAIT_UNCLOCKED_POWER_OFF, /* WAIT + SRPG */
190 STOP_POWER_ON, /* just STOP */
191 STOP_POWER_OFF, /* STOP + SRPG */
192};
193 186
194extern struct cpu_op *(*get_cpu_op)(int *op); 187extern struct cpu_op *(*get_cpu_op)(int *op);
195#endif 188#endif
diff --git a/arch/arm/plat-mxc/include/mach/system.h b/arch/arm/plat-mxc/include/mach/system.h
index 51f02a9d41a3..cf88b3593fba 100644
--- a/arch/arm/plat-mxc/include/mach/system.h
+++ b/arch/arm/plat-mxc/include/mach/system.h
@@ -17,41 +17,12 @@
17#ifndef __ASM_ARCH_MXC_SYSTEM_H__ 17#ifndef __ASM_ARCH_MXC_SYSTEM_H__
18#define __ASM_ARCH_MXC_SYSTEM_H__ 18#define __ASM_ARCH_MXC_SYSTEM_H__
19 19
20#include <mach/hardware.h> 20extern void (*imx_idle)(void);
21#include <mach/common.h>
22
23extern void mx5_cpu_lp_set(enum mxc_cpu_pwr_mode mode);
24 21
25static inline void arch_idle(void) 22static inline void arch_idle(void)
26{ 23{
27 /* fix i.MX31 errata TLSbo65953 and i.MX35 errata ENGcm09472 */ 24 if (imx_idle != NULL)
28 if (cpu_is_mx31() || cpu_is_mx35()) { 25 (imx_idle)();
29 unsigned long reg = 0;
30 __asm__ __volatile__(
31 /* disable I and D cache */
32 "mrc p15, 0, %0, c1, c0, 0\n"
33 "bic %0, %0, #0x00001000\n"
34 "bic %0, %0, #0x00000004\n"
35 "mcr p15, 0, %0, c1, c0, 0\n"
36 /* invalidate I cache */
37 "mov %0, #0\n"
38 "mcr p15, 0, %0, c7, c5, 0\n"
39 /* clear and invalidate D cache */
40 "mov %0, #0\n"
41 "mcr p15, 0, %0, c7, c14, 0\n"
42 /* WFI */
43 "mov %0, #0\n"
44 "mcr p15, 0, %0, c7, c0, 4\n"
45 "nop\n" "nop\n" "nop\n" "nop\n"
46 "nop\n" "nop\n" "nop\n"
47 /* enable I and D cache */
48 "mrc p15, 0, %0, c1, c0, 0\n"
49 "orr %0, %0, #0x00001000\n"
50 "orr %0, %0, #0x00000004\n"
51 "mcr p15, 0, %0, c1, c0, 0\n"
52 : "=r" (reg));
53 } else if (cpu_is_mx51())
54 mx5_cpu_lp_set(WAIT_UNCLOCKED_POWER_OFF);
55 else 26 else
56 cpu_do_idle(); 27 cpu_do_idle();
57} 28}
diff --git a/arch/arm/plat-mxc/system.c b/arch/arm/plat-mxc/system.c
index 8024f2ac177c..5fa03e7548ee 100644
--- a/arch/arm/plat-mxc/system.c
+++ b/arch/arm/plat-mxc/system.c
@@ -28,6 +28,8 @@
28#include <asm/system.h> 28#include <asm/system.h>
29#include <asm/mach-types.h> 29#include <asm/mach-types.h>
30 30
31void (*imx_idle)(void) = NULL;
32
31static void __iomem *wdog_base; 33static void __iomem *wdog_base;
32 34
33/* 35/*