diff options
Diffstat (limited to 'arch/arm/plat-mxc/time.c')
-rw-r--r-- | arch/arm/plat-mxc/time.c | 24 |
1 files changed, 12 insertions, 12 deletions
diff --git a/arch/arm/plat-mxc/time.c b/arch/arm/plat-mxc/time.c index 99f958ca6cb8..00e8e659e667 100644 --- a/arch/arm/plat-mxc/time.c +++ b/arch/arm/plat-mxc/time.c | |||
@@ -58,6 +58,7 @@ | |||
58 | /* MX31, MX35, MX25, MX5 */ | 58 | /* MX31, MX35, MX25, MX5 */ |
59 | #define V2_TCTL_WAITEN (1 << 3) /* Wait enable mode */ | 59 | #define V2_TCTL_WAITEN (1 << 3) /* Wait enable mode */ |
60 | #define V2_TCTL_CLK_IPG (1 << 6) | 60 | #define V2_TCTL_CLK_IPG (1 << 6) |
61 | #define V2_TCTL_CLK_PER (2 << 6) | ||
61 | #define V2_TCTL_FRR (1 << 9) | 62 | #define V2_TCTL_FRR (1 << 9) |
62 | #define V2_IR 0x0c | 63 | #define V2_IR 0x0c |
63 | #define V2_TSTAT 0x08 | 64 | #define V2_TSTAT 0x08 |
@@ -280,23 +281,22 @@ static int __init mxc_clockevent_init(struct clk *timer_clk) | |||
280 | return 0; | 281 | return 0; |
281 | } | 282 | } |
282 | 283 | ||
283 | void __init mxc_timer_init(struct clk *timer_clk, void __iomem *base, int irq) | 284 | void __init mxc_timer_init(void __iomem *base, int irq) |
284 | { | 285 | { |
285 | uint32_t tctl_val; | 286 | uint32_t tctl_val; |
287 | struct clk *timer_clk; | ||
286 | struct clk *timer_ipg_clk; | 288 | struct clk *timer_ipg_clk; |
287 | 289 | ||
288 | if (!timer_clk) { | 290 | timer_clk = clk_get_sys("imx-gpt.0", "per"); |
289 | timer_clk = clk_get_sys("imx-gpt.0", "per"); | 291 | if (IS_ERR(timer_clk)) { |
290 | if (IS_ERR(timer_clk)) { | 292 | pr_err("i.MX timer: unable to get clk\n"); |
291 | pr_err("i.MX timer: unable to get clk\n"); | 293 | return; |
292 | return; | ||
293 | } | ||
294 | |||
295 | timer_ipg_clk = clk_get_sys("imx-gpt.0", "ipg"); | ||
296 | if (!IS_ERR(timer_ipg_clk)) | ||
297 | clk_prepare_enable(timer_ipg_clk); | ||
298 | } | 294 | } |
299 | 295 | ||
296 | timer_ipg_clk = clk_get_sys("imx-gpt.0", "ipg"); | ||
297 | if (!IS_ERR(timer_ipg_clk)) | ||
298 | clk_prepare_enable(timer_ipg_clk); | ||
299 | |||
300 | clk_prepare_enable(timer_clk); | 300 | clk_prepare_enable(timer_clk); |
301 | 301 | ||
302 | timer_base = base; | 302 | timer_base = base; |
@@ -309,7 +309,7 @@ void __init mxc_timer_init(struct clk *timer_clk, void __iomem *base, int irq) | |||
309 | __raw_writel(0, timer_base + MXC_TPRER); /* see datasheet note */ | 309 | __raw_writel(0, timer_base + MXC_TPRER); /* see datasheet note */ |
310 | 310 | ||
311 | if (timer_is_v2()) | 311 | if (timer_is_v2()) |
312 | tctl_val = V2_TCTL_CLK_IPG | V2_TCTL_FRR | V2_TCTL_WAITEN | MXC_TCTL_TEN; | 312 | tctl_val = V2_TCTL_CLK_PER | V2_TCTL_FRR | V2_TCTL_WAITEN | MXC_TCTL_TEN; |
313 | else | 313 | else |
314 | tctl_val = MX1_2_TCTL_FRR | MX1_2_TCTL_CLK_PCLK1 | MXC_TCTL_TEN; | 314 | tctl_val = MX1_2_TCTL_FRR | MX1_2_TCTL_CLK_PCLK1 | MXC_TCTL_TEN; |
315 | 315 | ||