1 files changed, 15 insertions, 4 deletions

diff --git a/arch/arm/plat-mxc/pwm.c b/arch/arm/plat-mxc/pwm.c
index ae34198a79dd..5cdbd605ac05 100644
--- a/arch/arm/plat-mxc/pwm.c
+++ b/arch/arm/plat-mxc/pwm.c
@@ -32,6 +32,7 @@
 #define MX3_PWMPR                 0x10    /* PWM Period Register */
 #define MX3_PWMCR_PRESCALER(x)    (((x - 1) & 0xFFF) << 4)
 #define MX3_PWMCR_CLKSRC_IPG_HIGH (2 << 16)
+#define MX3_PWMCR_CLKSRC_IPG      (1 << 16)
 #define MX3_PWMCR_EN              (1 << 0)
 
 
@@ -55,9 +56,11 @@ int pwm_config(struct pwm_device *pwm, int duty_ns, int period_ns)
         if (pwm == NULL || period_ns == 0 || duty_ns > period_ns)
                 return -EINVAL;
 
-        if (cpu_is_mx27() || cpu_is_mx3()) {
+        if (cpu_is_mx27() || cpu_is_mx3() || cpu_is_mx25()) {
                 unsigned long long c;
                 unsigned long period_cycles, duty_cycles, prescale;
+                u32 cr;
+
                 c = clk_get_rate(pwm->clk);
                 c = c * period_ns;
                 do_div(c, 1000000000);
@@ -72,9 +75,15 @@ int pwm_config(struct pwm_device *pwm, int duty_ns, int period_ns)
 
                 writel(duty_cycles, pwm->mmio_base + MX3_PWMSAR);
                 writel(period_cycles, pwm->mmio_base + MX3_PWMPR);
-                writel(MX3_PWMCR_PRESCALER(prescale - 1) |
-                        MX3_PWMCR_CLKSRC_IPG_HIGH | MX3_PWMCR_EN,
-                        pwm->mmio_base + MX3_PWMCR);
+
+                cr = MX3_PWMCR_PRESCALER(prescale) | MX3_PWMCR_EN;
+
+                if (cpu_is_mx25())
+                        cr |= MX3_PWMCR_CLKSRC_IPG;
+                else
+                        cr |= MX3_PWMCR_CLKSRC_IPG_HIGH;
+
+                writel(cr, pwm->mmio_base + MX3_PWMCR);
         } else if (cpu_is_mx1() || cpu_is_mx21()) {
                 /* The PWM subsystem allows for exact frequencies. However,
                  * I cannot connect a scope on my device to the PWM line and
@@ -118,6 +127,8 @@ EXPORT_SYMBOL(pwm_enable);
 
 void pwm_disable(struct pwm_device *pwm)
 {
+        writel(0, pwm->mmio_base + MX3_PWMCR);
+
         if (pwm->clk_enabled) {
                 clk_disable(pwm->clk);
                 pwm->clk_enabled = 0;