diff options
Diffstat (limited to 'arch/arm/plat-mxc/include/mach')
-rw-r--r-- | arch/arm/plat-mxc/include/mach/common.h | 12 | ||||
-rw-r--r-- | arch/arm/plat-mxc/include/mach/debug-macro.S | 10 | ||||
-rw-r--r-- | arch/arm/plat-mxc/include/mach/devices-common.h | 8 | ||||
-rw-r--r-- | arch/arm/plat-mxc/include/mach/gpio.h | 27 | ||||
-rw-r--r-- | arch/arm/plat-mxc/include/mach/hardware.h | 28 | ||||
-rw-r--r-- | arch/arm/plat-mxc/include/mach/iomux-mx53.h | 14 | ||||
-rw-r--r-- | arch/arm/plat-mxc/include/mach/iomux-v1.h | 4 | ||||
-rw-r--r-- | arch/arm/plat-mxc/include/mach/iomux-v3.h | 2 | ||||
-rw-r--r-- | arch/arm/plat-mxc/include/mach/iomux.h | 26 | ||||
-rw-r--r-- | arch/arm/plat-mxc/include/mach/mx53.h | 54 | ||||
-rw-r--r-- | arch/arm/plat-mxc/include/mach/mxc.h | 8 | ||||
-rw-r--r-- | arch/arm/plat-mxc/include/mach/sdma.h | 6 | ||||
-rw-r--r-- | arch/arm/plat-mxc/include/mach/timex.h | 13 | ||||
-rw-r--r-- | arch/arm/plat-mxc/include/mach/uncompress.h | 1 |
14 files changed, 73 insertions, 140 deletions
diff --git a/arch/arm/plat-mxc/include/mach/common.h b/arch/arm/plat-mxc/include/mach/common.h index da7991832af6..91fa2632aa5e 100644 --- a/arch/arm/plat-mxc/include/mach/common.h +++ b/arch/arm/plat-mxc/include/mach/common.h | |||
@@ -43,6 +43,15 @@ extern void mx35_init_irq(void); | |||
43 | extern void mx50_init_irq(void); | 43 | extern void mx50_init_irq(void); |
44 | extern void mx51_init_irq(void); | 44 | extern void mx51_init_irq(void); |
45 | extern void mx53_init_irq(void); | 45 | extern void mx53_init_irq(void); |
46 | extern void imx1_soc_init(void); | ||
47 | extern void imx21_soc_init(void); | ||
48 | extern void imx25_soc_init(void); | ||
49 | extern void imx27_soc_init(void); | ||
50 | extern void imx31_soc_init(void); | ||
51 | extern void imx35_soc_init(void); | ||
52 | extern void imx50_soc_init(void); | ||
53 | extern void imx51_soc_init(void); | ||
54 | extern void imx53_soc_init(void); | ||
46 | extern void epit_timer_init(struct clk *timer_clk, void __iomem *base, int irq); | 55 | extern void epit_timer_init(struct clk *timer_clk, void __iomem *base, int irq); |
47 | extern void mxc_timer_init(struct clk *timer_clk, void __iomem *, int); | 56 | extern void mxc_timer_init(struct clk *timer_clk, void __iomem *, int); |
48 | extern int mx1_clocks_init(unsigned long fref); | 57 | extern int mx1_clocks_init(unsigned long fref); |
@@ -55,7 +64,8 @@ extern int mx51_clocks_init(unsigned long ckil, unsigned long osc, | |||
55 | unsigned long ckih1, unsigned long ckih2); | 64 | unsigned long ckih1, unsigned long ckih2); |
56 | extern int mx53_clocks_init(unsigned long ckil, unsigned long osc, | 65 | extern int mx53_clocks_init(unsigned long ckil, unsigned long osc, |
57 | unsigned long ckih1, unsigned long ckih2); | 66 | unsigned long ckih1, unsigned long ckih2); |
58 | extern int mxc_register_gpios(void); | 67 | extern struct platform_device *mxc_register_gpio(int id, |
68 | resource_size_t iobase, resource_size_t iosize, int irq, int irq_high); | ||
59 | extern int mxc_register_device(struct platform_device *pdev, void *data); | 69 | extern int mxc_register_device(struct platform_device *pdev, void *data); |
60 | extern void mxc_set_cpu_type(unsigned int type); | 70 | extern void mxc_set_cpu_type(unsigned int type); |
61 | extern void mxc_arch_reset_init(void __iomem *); | 71 | extern void mxc_arch_reset_init(void __iomem *); |
diff --git a/arch/arm/plat-mxc/include/mach/debug-macro.S b/arch/arm/plat-mxc/include/mach/debug-macro.S index 8e8d175e5077..91fc7cdb5dc9 100644 --- a/arch/arm/plat-mxc/include/mach/debug-macro.S +++ b/arch/arm/plat-mxc/include/mach/debug-macro.S | |||
@@ -12,32 +12,32 @@ | |||
12 | */ | 12 | */ |
13 | #include <mach/hardware.h> | 13 | #include <mach/hardware.h> |
14 | 14 | ||
15 | #ifdef CONFIG_ARCH_MX1 | 15 | #ifdef CONFIG_SOC_IMX1 |
16 | #define UART_PADDR MX1_UART1_BASE_ADDR | 16 | #define UART_PADDR MX1_UART1_BASE_ADDR |
17 | #endif | 17 | #endif |
18 | 18 | ||
19 | #ifdef CONFIG_ARCH_MX25 | 19 | #ifdef CONFIG_SOC_IMX25 |
20 | #ifdef UART_PADDR | 20 | #ifdef UART_PADDR |
21 | #error "CONFIG_DEBUG_LL is incompatible with multiple archs" | 21 | #error "CONFIG_DEBUG_LL is incompatible with multiple archs" |
22 | #endif | 22 | #endif |
23 | #define UART_PADDR MX25_UART1_BASE_ADDR | 23 | #define UART_PADDR MX25_UART1_BASE_ADDR |
24 | #endif | 24 | #endif |
25 | 25 | ||
26 | #ifdef CONFIG_ARCH_MX2 | 26 | #if defined(CONFIG_SOC_IMX21) || defined (CONFIG_SOC_IMX27) |
27 | #ifdef UART_PADDR | 27 | #ifdef UART_PADDR |
28 | #error "CONFIG_DEBUG_LL is incompatible with multiple archs" | 28 | #error "CONFIG_DEBUG_LL is incompatible with multiple archs" |
29 | #endif | 29 | #endif |
30 | #define UART_PADDR MX2x_UART1_BASE_ADDR | 30 | #define UART_PADDR MX2x_UART1_BASE_ADDR |
31 | #endif | 31 | #endif |
32 | 32 | ||
33 | #ifdef CONFIG_ARCH_MX3 | 33 | #if defined(CONFIG_SOC_IMX31) || defined(CONFIG_SOC_IMX35) |
34 | #ifdef UART_PADDR | 34 | #ifdef UART_PADDR |
35 | #error "CONFIG_DEBUG_LL is incompatible with multiple archs" | 35 | #error "CONFIG_DEBUG_LL is incompatible with multiple archs" |
36 | #endif | 36 | #endif |
37 | #define UART_PADDR MX3x_UART1_BASE_ADDR | 37 | #define UART_PADDR MX3x_UART1_BASE_ADDR |
38 | #endif | 38 | #endif |
39 | 39 | ||
40 | #ifdef CONFIG_ARCH_MX5 | 40 | #ifdef CONFIG_SOC_IMX51 |
41 | #ifdef UART_PADDR | 41 | #ifdef UART_PADDR |
42 | #error "CONFIG_DEBUG_LL is incompatible with multiple archs" | 42 | #error "CONFIG_DEBUG_LL is incompatible with multiple archs" |
43 | #endif | 43 | #endif |
diff --git a/arch/arm/plat-mxc/include/mach/devices-common.h b/arch/arm/plat-mxc/include/mach/devices-common.h index fa8477337f91..bf93820ab61c 100644 --- a/arch/arm/plat-mxc/include/mach/devices-common.h +++ b/arch/arm/plat-mxc/include/mach/devices-common.h | |||
@@ -9,6 +9,10 @@ | |||
9 | #include <linux/kernel.h> | 9 | #include <linux/kernel.h> |
10 | #include <linux/platform_device.h> | 10 | #include <linux/platform_device.h> |
11 | #include <linux/init.h> | 11 | #include <linux/init.h> |
12 | #include <mach/sdma.h> | ||
13 | |||
14 | extern struct device mxc_aips_bus; | ||
15 | extern struct device mxc_ahb_bus; | ||
12 | 16 | ||
13 | struct platform_device *imx_add_platform_device_dmamask( | 17 | struct platform_device *imx_add_platform_device_dmamask( |
14 | const char *name, int id, | 18 | const char *name, int id, |
@@ -291,3 +295,7 @@ struct imx_spi_imx_data { | |||
291 | struct platform_device *__init imx_add_spi_imx( | 295 | struct platform_device *__init imx_add_spi_imx( |
292 | const struct imx_spi_imx_data *data, | 296 | const struct imx_spi_imx_data *data, |
293 | const struct spi_imx_master *pdata); | 297 | const struct spi_imx_master *pdata); |
298 | |||
299 | struct platform_device *imx_add_imx_dma(void); | ||
300 | struct platform_device *imx_add_imx_sdma( | ||
301 | resource_size_t iobase, int irq, struct sdma_platform_data *pdata); | ||
diff --git a/arch/arm/plat-mxc/include/mach/gpio.h b/arch/arm/plat-mxc/include/mach/gpio.h index a2747f12813e..31c820c1b796 100644 --- a/arch/arm/plat-mxc/include/mach/gpio.h +++ b/arch/arm/plat-mxc/include/mach/gpio.h | |||
@@ -36,31 +36,4 @@ | |||
36 | #define gpio_to_irq(gpio) (MXC_GPIO_IRQ_START + (gpio)) | 36 | #define gpio_to_irq(gpio) (MXC_GPIO_IRQ_START + (gpio)) |
37 | #define irq_to_gpio(irq) ((irq) - MXC_GPIO_IRQ_START) | 37 | #define irq_to_gpio(irq) ((irq) - MXC_GPIO_IRQ_START) |
38 | 38 | ||
39 | struct mxc_gpio_port { | ||
40 | void __iomem *base; | ||
41 | int irq; | ||
42 | int irq_high; | ||
43 | int virtual_irq_start; | ||
44 | struct gpio_chip chip; | ||
45 | u32 both_edges; | ||
46 | spinlock_t lock; | ||
47 | }; | ||
48 | |||
49 | #define DEFINE_IMX_GPIO_PORT_IRQ_HIGH(soc, _id, _hwid, _irq, _irq_high) \ | ||
50 | { \ | ||
51 | .chip.label = "gpio-" #_id, \ | ||
52 | .irq = _irq, \ | ||
53 | .irq_high = _irq_high, \ | ||
54 | .base = soc ## _IO_ADDRESS( \ | ||
55 | soc ## _GPIO ## _hwid ## _BASE_ADDR), \ | ||
56 | .virtual_irq_start = MXC_GPIO_IRQ_START + (_id) * 32, \ | ||
57 | } | ||
58 | |||
59 | #define DEFINE_IMX_GPIO_PORT_IRQ(soc, _id, _hwid, _irq) \ | ||
60 | DEFINE_IMX_GPIO_PORT_IRQ_HIGH(soc, _id, _hwid, _irq, 0) | ||
61 | #define DEFINE_IMX_GPIO_PORT(soc, _id, _hwid) \ | ||
62 | DEFINE_IMX_GPIO_PORT_IRQ(soc, _id, _hwid, 0) | ||
63 | |||
64 | int mxc_gpio_init(struct mxc_gpio_port*, int); | ||
65 | |||
66 | #endif | 39 | #endif |
diff --git a/arch/arm/plat-mxc/include/mach/hardware.h b/arch/arm/plat-mxc/include/mach/hardware.h index 67d3e2bed065..a8bfd565dcad 100644 --- a/arch/arm/plat-mxc/include/mach/hardware.h +++ b/arch/arm/plat-mxc/include/mach/hardware.h | |||
@@ -97,35 +97,17 @@ | |||
97 | 97 | ||
98 | #include <mach/mxc.h> | 98 | #include <mach/mxc.h> |
99 | 99 | ||
100 | #ifdef CONFIG_ARCH_MX5 | ||
101 | #include <mach/mx50.h> | 100 | #include <mach/mx50.h> |
102 | #include <mach/mx51.h> | 101 | #include <mach/mx51.h> |
103 | #include <mach/mx53.h> | 102 | #include <mach/mx53.h> |
104 | #endif | ||
105 | |||
106 | #ifdef CONFIG_ARCH_MX3 | ||
107 | #include <mach/mx3x.h> | 103 | #include <mach/mx3x.h> |
108 | #include <mach/mx31.h> | 104 | #include <mach/mx31.h> |
109 | #include <mach/mx35.h> | 105 | #include <mach/mx35.h> |
110 | #endif | 106 | #include <mach/mx2x.h> |
111 | 107 | #include <mach/mx21.h> | |
112 | #ifdef CONFIG_ARCH_MX2 | 108 | #include <mach/mx27.h> |
113 | # include <mach/mx2x.h> | 109 | #include <mach/mx1.h> |
114 | # ifdef CONFIG_MACH_MX21 | 110 | #include <mach/mx25.h> |
115 | # include <mach/mx21.h> | ||
116 | # endif | ||
117 | # ifdef CONFIG_MACH_MX27 | ||
118 | # include <mach/mx27.h> | ||
119 | # endif | ||
120 | #endif | ||
121 | |||
122 | #ifdef CONFIG_ARCH_MX1 | ||
123 | # include <mach/mx1.h> | ||
124 | #endif | ||
125 | |||
126 | #ifdef CONFIG_ARCH_MX25 | ||
127 | # include <mach/mx25.h> | ||
128 | #endif | ||
129 | 111 | ||
130 | #define imx_map_entry(soc, name, _type) { \ | 112 | #define imx_map_entry(soc, name, _type) { \ |
131 | .virtual = soc ## _IO_P2V(soc ## _ ## name ## _BASE_ADDR), \ | 113 | .virtual = soc ## _IO_P2V(soc ## _ ## name ## _BASE_ADDR), \ |
diff --git a/arch/arm/plat-mxc/include/mach/iomux-mx53.h b/arch/arm/plat-mxc/include/mach/iomux-mx53.h index e95d9cb8aeb7..e11dd5f09c34 100644 --- a/arch/arm/plat-mxc/include/mach/iomux-mx53.h +++ b/arch/arm/plat-mxc/include/mach/iomux-mx53.h | |||
@@ -39,7 +39,7 @@ | |||
39 | #define _MX53_PAD_GPIO_19__ECSPI1_RDY IOMUX_PAD(0x348, 0x20, 5, 0x0, 0, 0) | 39 | #define _MX53_PAD_GPIO_19__ECSPI1_RDY IOMUX_PAD(0x348, 0x20, 5, 0x0, 0, 0) |
40 | #define _MX53_PAD_GPIO_19__FEC_TDATA_3 IOMUX_PAD(0x348, 0x20, 6, 0x0, 0, 0) | 40 | #define _MX53_PAD_GPIO_19__FEC_TDATA_3 IOMUX_PAD(0x348, 0x20, 6, 0x0, 0, 0) |
41 | #define _MX53_PAD_GPIO_19__SRC_INT_BOOT IOMUX_PAD(0x348, 0x20,7, 0x0, 0, 0) | 41 | #define _MX53_PAD_GPIO_19__SRC_INT_BOOT IOMUX_PAD(0x348, 0x20,7, 0x0, 0, 0) |
42 | #define _MX53_PAD_KEY_COL0__KPP_COL_0 IOMUX_PAD(0x34C, 0x24, o, 0x0, 0, 0) | 42 | #define _MX53_PAD_KEY_COL0__KPP_COL_0 IOMUX_PAD(0x34C, 0x24, 0, 0x0, 0, 0) |
43 | #define _MX53_PAD_KEY_COL0__GPIO4_6 IOMUX_PAD(0x34C, 0x24, 1, 0x0, 0, 0) | 43 | #define _MX53_PAD_KEY_COL0__GPIO4_6 IOMUX_PAD(0x34C, 0x24, 1, 0x0, 0, 0) |
44 | #define _MX53_PAD_KEY_COL0__AUDMUX_AUD5_TXC IOMUX_PAD(0x34C, 0x24, 2, 0x758, 0, 0) | 44 | #define _MX53_PAD_KEY_COL0__AUDMUX_AUD5_TXC IOMUX_PAD(0x34C, 0x24, 2, 0x758, 0, 0) |
45 | #define _MX53_PAD_KEY_COL0__UART4_TXD_MUX IOMUX_PAD(0x34C, 0x24, 4, 0x890, 0, 0) | 45 | #define _MX53_PAD_KEY_COL0__UART4_TXD_MUX IOMUX_PAD(0x34C, 0x24, 4, 0x890, 0, 0) |
@@ -697,7 +697,7 @@ | |||
697 | #define _MX53_PAD_EIM_DA5__GPIO3_5 IOMUX_PAD(0x500, 0x1B0, 1, 0x0, 0, 0) | 697 | #define _MX53_PAD_EIM_DA5__GPIO3_5 IOMUX_PAD(0x500, 0x1B0, 1, 0x0, 0, 0) |
698 | #define _MX53_PAD_EIM_DA5__IPU_DISP1_DAT_4 IOMUX_PAD(0x500, 0x1B0, 3, 0x0, 0, 0) | 698 | #define _MX53_PAD_EIM_DA5__IPU_DISP1_DAT_4 IOMUX_PAD(0x500, 0x1B0, 3, 0x0, 0, 0) |
699 | #define _MX53_PAD_EIM_DA5__IPU_CSI1_D_4 IOMUX_PAD(0x500, 0x1B0, 4, 0x0, 0, 0) | 699 | #define _MX53_PAD_EIM_DA5__IPU_CSI1_D_4 IOMUX_PAD(0x500, 0x1B0, 4, 0x0, 0, 0) |
700 | #define _MX53_PAD_EIM_DA5__SRC_BT_CFG3_6 IOMUX_PAD(0x500, 0x1B0, 17, 0x0, 0, 0) | 700 | #define _MX53_PAD_EIM_DA5__SRC_BT_CFG3_6 IOMUX_PAD(0x500, 0x1B0, 7 | IOMUX_CONFIG_SION, 0x0, 0, 0) |
701 | #define _MX53_PAD_EIM_DA6__EMI_NAND_WEIM_DA_6 IOMUX_PAD(0x504, 0x1B4, 0, 0x0, 0, 0) | 701 | #define _MX53_PAD_EIM_DA6__EMI_NAND_WEIM_DA_6 IOMUX_PAD(0x504, 0x1B4, 0, 0x0, 0, 0) |
702 | #define _MX53_PAD_EIM_DA6__GPIO3_6 IOMUX_PAD(0x504, 0x1B4, 1, 0x0, 0, 0) | 702 | #define _MX53_PAD_EIM_DA6__GPIO3_6 IOMUX_PAD(0x504, 0x1B4, 1, 0x0, 0, 0) |
703 | #define _MX53_PAD_EIM_DA6__IPU_DISP1_DAT_3 IOMUX_PAD(0x504, 0x1B4, 3, 0x0, 0, 0) | 703 | #define _MX53_PAD_EIM_DA6__IPU_DISP1_DAT_3 IOMUX_PAD(0x504, 0x1B4, 3, 0x0, 0, 0) |
@@ -958,12 +958,12 @@ | |||
958 | #define _MX53_PAD_PATA_DATA5__ESDHC4_DAT5 IOMUX_PAD(0x63C, 0x2B8, 4, 0x0, 0, 0) | 958 | #define _MX53_PAD_PATA_DATA5__ESDHC4_DAT5 IOMUX_PAD(0x63C, 0x2B8, 4, 0x0, 0, 0) |
959 | #define _MX53_PAD_PATA_DATA5__GPU3d_GPU_DEBUG_OUT_5 IOMUX_PAD(0x63C, 0x2B8, 5, 0x0, 0, 0) | 959 | #define _MX53_PAD_PATA_DATA5__GPU3d_GPU_DEBUG_OUT_5 IOMUX_PAD(0x63C, 0x2B8, 5, 0x0, 0, 0) |
960 | #define _MX53_PAD_PATA_DATA5__IPU_DIAG_BUS_5 IOMUX_PAD(0x63C, 0x2B8, 6, 0x0, 0, 0) | 960 | #define _MX53_PAD_PATA_DATA5__IPU_DIAG_BUS_5 IOMUX_PAD(0x63C, 0x2B8, 6, 0x0, 0, 0) |
961 | #define _MX53_PAD_PATA_DATA6__PATA_DATA_6 IOMUX_PAD(0x640, 0x2BC, 1, 0x0, 0, 0) | 961 | #define _MX53_PAD_PATA_DATA6__PATA_DATA_6 IOMUX_PAD(0x640, 0x2BC, 0, 0x0, 0, 0) |
962 | #define _MX53_PAD_PATA_DATA6__GPIO2_6 IOMUX_PAD(0x640, 0x2BC, 1, 0x0, 0, 0) | 962 | #define _MX53_PAD_PATA_DATA6__GPIO2_6 IOMUX_PAD(0x640, 0x2BC, 1, 0x0, 0, 0) |
963 | #define _MX53_PAD_PATA_DATA6__EMI_NANDF_D_6 IOMUX_PAD(0x640, 0x2BC, 1, 0x0, 0, 0) | 963 | #define _MX53_PAD_PATA_DATA6__EMI_NANDF_D_6 IOMUX_PAD(0x640, 0x2BC, 3, 0x0, 0, 0) |
964 | #define _MX53_PAD_PATA_DATA6__ESDHC4_DAT6 IOMUX_PAD(0x640, 0x2BC, 1, 0x0, 0, 0) | 964 | #define _MX53_PAD_PATA_DATA6__ESDHC4_DAT6 IOMUX_PAD(0x640, 0x2BC, 4, 0x0, 0, 0) |
965 | #define _MX53_PAD_PATA_DATA6__GPU3d_GPU_DEBUG_OUT_6 IOMUX_PAD(0x640, 0x2BC, 1, 0x0, 0, 0) | 965 | #define _MX53_PAD_PATA_DATA6__GPU3d_GPU_DEBUG_OUT_6 IOMUX_PAD(0x640, 0x2BC, 5, 0x0, 0, 0) |
966 | #define _MX53_PAD_PATA_DATA6__IPU_DIAG_BUS_6 IOMUX_PAD(0x640, 0x2BC, 1, 0x0, 0, 0) | 966 | #define _MX53_PAD_PATA_DATA6__IPU_DIAG_BUS_6 IOMUX_PAD(0x640, 0x2BC, 6, 0x0, 0, 0) |
967 | #define _MX53_PAD_PATA_DATA7__PATA_DATA_7 IOMUX_PAD(0x644, 0x2C0, 0, 0x0, 0, 0) | 967 | #define _MX53_PAD_PATA_DATA7__PATA_DATA_7 IOMUX_PAD(0x644, 0x2C0, 0, 0x0, 0, 0) |
968 | #define _MX53_PAD_PATA_DATA7__GPIO2_7 IOMUX_PAD(0x644, 0x2C0, 1, 0x0, 0, 0) | 968 | #define _MX53_PAD_PATA_DATA7__GPIO2_7 IOMUX_PAD(0x644, 0x2C0, 1, 0x0, 0, 0) |
969 | #define _MX53_PAD_PATA_DATA7__EMI_NANDF_D_7 IOMUX_PAD(0x644, 0x2C0, 3, 0x0, 0, 0) | 969 | #define _MX53_PAD_PATA_DATA7__EMI_NANDF_D_7 IOMUX_PAD(0x644, 0x2C0, 3, 0x0, 0, 0) |
diff --git a/arch/arm/plat-mxc/include/mach/iomux-v1.h b/arch/arm/plat-mxc/include/mach/iomux-v1.h index c07d30210c57..6fa8a707b9a0 100644 --- a/arch/arm/plat-mxc/include/mach/iomux-v1.h +++ b/arch/arm/plat-mxc/include/mach/iomux-v1.h | |||
@@ -85,9 +85,6 @@ | |||
85 | #define GPIO_BOUT_0 (2 << GPIO_BOUT_SHIFT) | 85 | #define GPIO_BOUT_0 (2 << GPIO_BOUT_SHIFT) |
86 | #define GPIO_BOUT_1 (3 << GPIO_BOUT_SHIFT) | 86 | #define GPIO_BOUT_1 (3 << GPIO_BOUT_SHIFT) |
87 | 87 | ||
88 | /* decode irq number to use with IMR(x), ISR(x) and friends */ | ||
89 | #define IRQ_TO_REG(irq) ((irq - MXC_INTERNAL_IRQS) >> 5) | ||
90 | |||
91 | #define IRQ_GPIOA(x) (MXC_GPIO_IRQ_START + x) | 88 | #define IRQ_GPIOA(x) (MXC_GPIO_IRQ_START + x) |
92 | #define IRQ_GPIOB(x) (IRQ_GPIOA(32) + x) | 89 | #define IRQ_GPIOB(x) (IRQ_GPIOA(32) + x) |
93 | #define IRQ_GPIOC(x) (IRQ_GPIOB(32) + x) | 90 | #define IRQ_GPIOC(x) (IRQ_GPIOB(32) + x) |
@@ -98,7 +95,6 @@ | |||
98 | extern int mxc_gpio_mode(int gpio_mode); | 95 | extern int mxc_gpio_mode(int gpio_mode); |
99 | extern int mxc_gpio_setup_multiple_pins(const int *pin_list, unsigned count, | 96 | extern int mxc_gpio_setup_multiple_pins(const int *pin_list, unsigned count, |
100 | const char *label); | 97 | const char *label); |
101 | extern void mxc_gpio_release_multiple_pins(const int *pin_list, int count); | ||
102 | 98 | ||
103 | extern int __init imx_iomuxv1_init(void __iomem *base, int numports); | 99 | extern int __init imx_iomuxv1_init(void __iomem *base, int numports); |
104 | 100 | ||
diff --git a/arch/arm/plat-mxc/include/mach/iomux-v3.h b/arch/arm/plat-mxc/include/mach/iomux-v3.h index 82620af1922f..ebbce33097a7 100644 --- a/arch/arm/plat-mxc/include/mach/iomux-v3.h +++ b/arch/arm/plat-mxc/include/mach/iomux-v3.h | |||
@@ -66,7 +66,6 @@ typedef u64 iomux_v3_cfg_t; | |||
66 | #define MUX_MODE_MASK ((iomux_v3_cfg_t)0x1f << MUX_MODE_SHIFT) | 66 | #define MUX_MODE_MASK ((iomux_v3_cfg_t)0x1f << MUX_MODE_SHIFT) |
67 | #define MUX_PAD_CTRL_SHIFT 41 | 67 | #define MUX_PAD_CTRL_SHIFT 41 |
68 | #define MUX_PAD_CTRL_MASK ((iomux_v3_cfg_t)0x1ffff << MUX_PAD_CTRL_SHIFT) | 68 | #define MUX_PAD_CTRL_MASK ((iomux_v3_cfg_t)0x1ffff << MUX_PAD_CTRL_SHIFT) |
69 | #define NO_PAD_CTRL ((iomux_v3_cfg_t)1 << (MUX_PAD_CTRL_SHIFT + 16)) | ||
70 | #define MUX_SEL_INPUT_SHIFT 58 | 69 | #define MUX_SEL_INPUT_SHIFT 58 |
71 | #define MUX_SEL_INPUT_MASK ((iomux_v3_cfg_t)0xf << MUX_SEL_INPUT_SHIFT) | 70 | #define MUX_SEL_INPUT_MASK ((iomux_v3_cfg_t)0xf << MUX_SEL_INPUT_SHIFT) |
72 | 71 | ||
@@ -85,6 +84,7 @@ typedef u64 iomux_v3_cfg_t; | |||
85 | * Use to set PAD control | 84 | * Use to set PAD control |
86 | */ | 85 | */ |
87 | 86 | ||
87 | #define NO_PAD_CTRL (1 << 16) | ||
88 | #define PAD_CTL_DVS (1 << 13) | 88 | #define PAD_CTL_DVS (1 << 13) |
89 | #define PAD_CTL_HYS (1 << 8) | 89 | #define PAD_CTL_HYS (1 << 8) |
90 | 90 | ||
diff --git a/arch/arm/plat-mxc/include/mach/iomux.h b/arch/arm/plat-mxc/include/mach/iomux.h deleted file mode 100644 index 3d226d7e7be2..000000000000 --- a/arch/arm/plat-mxc/include/mach/iomux.h +++ /dev/null | |||
@@ -1,26 +0,0 @@ | |||
1 | /* | ||
2 | * Copyright (C) 2010 Uwe Kleine-Koenig, Pengutronix | ||
3 | * | ||
4 | * This program is free software; you can redistribute it and/or modify it | ||
5 | * under the terms of the GNU General Public License version 2 as published by | ||
6 | * the Free Software Foundation. | ||
7 | */ | ||
8 | #ifndef __MACH_IOMUX_H__ | ||
9 | #define __MACH_IOMUX_H__ | ||
10 | |||
11 | /* This file will go away, please include mach/iomux-mx... directly */ | ||
12 | |||
13 | #ifdef CONFIG_ARCH_MX1 | ||
14 | #include <mach/iomux-mx1.h> | ||
15 | #endif | ||
16 | #ifdef CONFIG_ARCH_MX2 | ||
17 | #include <mach/iomux-mx2x.h> | ||
18 | #ifdef CONFIG_MACH_MX21 | ||
19 | #include <mach/iomux-mx21.h> | ||
20 | #endif | ||
21 | #ifdef CONFIG_MACH_MX27 | ||
22 | #include <mach/iomux-mx27.h> | ||
23 | #endif | ||
24 | #endif | ||
25 | |||
26 | #endif /* __MACH_IOMUX_H__ */ | ||
diff --git a/arch/arm/plat-mxc/include/mach/mx53.h b/arch/arm/plat-mxc/include/mach/mx53.h index 9d2a1ef84de2..5e3c3236ebf3 100644 --- a/arch/arm/plat-mxc/include/mach/mx53.h +++ b/arch/arm/plat-mxc/include/mach/mx53.h | |||
@@ -145,14 +145,14 @@ | |||
145 | /* | 145 | /* |
146 | * Memory regions and CS | 146 | * Memory regions and CS |
147 | */ | 147 | */ |
148 | #define MX53_CSD0_BASE_ADDR 0x90000000 | 148 | #define MX53_CSD0_BASE_ADDR 0x70000000 |
149 | #define MX53_CSD1_BASE_ADDR 0xA0000000 | 149 | #define MX53_CSD1_BASE_ADDR 0xB0000000 |
150 | #define MX53_CS0_BASE_ADDR 0xB0000000 | 150 | #define MX53_CS0_BASE_ADDR 0xF0000000 |
151 | #define MX53_CS1_BASE_ADDR 0xB8000000 | 151 | #define MX53_CS1_32MB_BASE_ADDR 0xF2000000 |
152 | #define MX53_CS2_BASE_ADDR 0xC0000000 | 152 | #define MX53_CS1_64MB_BASE_ADDR 0xF4000000 |
153 | #define MX53_CS3_BASE_ADDR 0xC8000000 | 153 | #define MX53_CS2_64MB_BASE_ADDR 0xF4000000 |
154 | #define MX53_CS4_BASE_ADDR 0xCC000000 | 154 | #define MX53_CS2_96MB_BASE_ADDR 0xF6000000 |
155 | #define MX53_CS5_BASE_ADDR 0xCE000000 | 155 | #define MX53_CS3_BASE_ADDR 0xF6000000 |
156 | 156 | ||
157 | #define MX53_IO_P2V(x) IMX_IO_P2V(x) | 157 | #define MX53_IO_P2V(x) IMX_IO_P2V(x) |
158 | #define MX53_IO_ADDRESS(x) IOMEM(MX53_IO_P2V(x)) | 158 | #define MX53_IO_ADDRESS(x) IOMEM(MX53_IO_P2V(x)) |
@@ -176,10 +176,10 @@ | |||
176 | /* | 176 | /* |
177 | * DMA request assignments | 177 | * DMA request assignments |
178 | */ | 178 | */ |
179 | #define MX53_DMA_REQ_SSI3_TX1 47 | 179 | #define MX53_DMA_REQ_SSI3_TX0 47 |
180 | #define MX53_DMA_REQ_SSI3_RX1 46 | 180 | #define MX53_DMA_REQ_SSI3_RX0 46 |
181 | #define MX53_DMA_REQ_SSI3_TX2 45 | 181 | #define MX53_DMA_REQ_SSI3_TX1 45 |
182 | #define MX53_DMA_REQ_SSI3_RX2 44 | 182 | #define MX53_DMA_REQ_SSI3_RX1 44 |
183 | #define MX53_DMA_REQ_UART3_TX 43 | 183 | #define MX53_DMA_REQ_UART3_TX 43 |
184 | #define MX53_DMA_REQ_UART3_RX 42 | 184 | #define MX53_DMA_REQ_UART3_RX 42 |
185 | #define MX53_DMA_REQ_ESAI_TX 41 | 185 | #define MX53_DMA_REQ_ESAI_TX 41 |
@@ -194,14 +194,14 @@ | |||
194 | #define MX53_DMA_REQ_ASRC_DMA1 32 | 194 | #define MX53_DMA_REQ_ASRC_DMA1 32 |
195 | #define MX53_DMA_REQ_EMI_WR 31 | 195 | #define MX53_DMA_REQ_EMI_WR 31 |
196 | #define MX53_DMA_REQ_EMI_RD 30 | 196 | #define MX53_DMA_REQ_EMI_RD 30 |
197 | #define MX53_DMA_REQ_SSI1_TX1 29 | 197 | #define MX53_DMA_REQ_SSI1_TX0 29 |
198 | #define MX53_DMA_REQ_SSI1_RX1 28 | 198 | #define MX53_DMA_REQ_SSI1_RX0 28 |
199 | #define MX53_DMA_REQ_SSI1_TX2 27 | 199 | #define MX53_DMA_REQ_SSI1_TX1 27 |
200 | #define MX53_DMA_REQ_SSI1_RX2 26 | 200 | #define MX53_DMA_REQ_SSI1_RX1 26 |
201 | #define MX53_DMA_REQ_SSI2_TX1 25 | 201 | #define MX53_DMA_REQ_SSI2_TX0 25 |
202 | #define MX53_DMA_REQ_SSI2_RX1 24 | 202 | #define MX53_DMA_REQ_SSI2_RX0 24 |
203 | #define MX53_DMA_REQ_SSI2_TX2 23 | 203 | #define MX53_DMA_REQ_SSI2_TX1 23 |
204 | #define MX53_DMA_REQ_SSI2_RX2 22 | 204 | #define MX53_DMA_REQ_SSI2_RX1 22 |
205 | #define MX53_DMA_REQ_I2C2_SDHC2 21 | 205 | #define MX53_DMA_REQ_I2C2_SDHC2 21 |
206 | #define MX53_DMA_REQ_I2C1_SDHC1 20 | 206 | #define MX53_DMA_REQ_I2C1_SDHC1 20 |
207 | #define MX53_DMA_REQ_UART1_TX 19 | 207 | #define MX53_DMA_REQ_UART1_TX 19 |
@@ -233,7 +233,7 @@ | |||
233 | #define MX53_INT_ESDHC2 2 | 233 | #define MX53_INT_ESDHC2 2 |
234 | #define MX53_INT_ESDHC3 3 | 234 | #define MX53_INT_ESDHC3 3 |
235 | #define MX53_INT_ESDHC4 4 | 235 | #define MX53_INT_ESDHC4 4 |
236 | #define MX53_INT_RESV5 5 | 236 | #define MX53_INT_DAP 5 |
237 | #define MX53_INT_SDMA 6 | 237 | #define MX53_INT_SDMA 6 |
238 | #define MX53_INT_IOMUX 7 | 238 | #define MX53_INT_IOMUX 7 |
239 | #define MX53_INT_NFC 8 | 239 | #define MX53_INT_NFC 8 |
@@ -241,7 +241,7 @@ | |||
241 | #define MX53_INT_IPU_ERR 10 | 241 | #define MX53_INT_IPU_ERR 10 |
242 | #define MX53_INT_IPU_SYN 11 | 242 | #define MX53_INT_IPU_SYN 11 |
243 | #define MX53_INT_GPU 12 | 243 | #define MX53_INT_GPU 12 |
244 | #define MX53_INT_RESV13 13 | 244 | #define MX53_INT_UART4 13 |
245 | #define MX53_INT_USB_H1 14 | 245 | #define MX53_INT_USB_H1 14 |
246 | #define MX53_INT_EMI 15 | 246 | #define MX53_INT_EMI 15 |
247 | #define MX53_INT_USB_H2 16 | 247 | #define MX53_INT_USB_H2 16 |
@@ -262,8 +262,8 @@ | |||
262 | #define MX53_INT_UART1 31 | 262 | #define MX53_INT_UART1 31 |
263 | #define MX53_INT_UART2 32 | 263 | #define MX53_INT_UART2 32 |
264 | #define MX53_INT_UART3 33 | 264 | #define MX53_INT_UART3 33 |
265 | #define MX53_INT_RESV34 34 | 265 | #define MX53_INT_RTC 34 |
266 | #define MX53_INT_RESV35 35 | 266 | #define MX53_INT_PTP 35 |
267 | #define MX53_INT_ECSPI1 36 | 267 | #define MX53_INT_ECSPI1 36 |
268 | #define MX53_INT_ECSPI2 37 | 268 | #define MX53_INT_ECSPI2 37 |
269 | #define MX53_INT_CSPI 38 | 269 | #define MX53_INT_CSPI 38 |
@@ -293,8 +293,8 @@ | |||
293 | #define MX53_INT_I2C1 62 | 293 | #define MX53_INT_I2C1 62 |
294 | #define MX53_INT_I2C2 63 | 294 | #define MX53_INT_I2C2 63 |
295 | #define MX53_INT_I2C3 64 | 295 | #define MX53_INT_I2C3 64 |
296 | #define MX53_INT_RESV65 65 | 296 | #define MX53_INT_MLB 65 |
297 | #define MX53_INT_RESV66 66 | 297 | #define MX53_INT_ASRC 66 |
298 | #define MX53_INT_SPDIF 67 | 298 | #define MX53_INT_SPDIF 67 |
299 | #define MX53_INT_SIM_DAT 68 | 299 | #define MX53_INT_SIM_DAT 68 |
300 | #define MX53_INT_IIM 69 | 300 | #define MX53_INT_IIM 69 |
@@ -314,7 +314,7 @@ | |||
314 | #define MX53_INT_CAN2 83 | 314 | #define MX53_INT_CAN2 83 |
315 | #define MX53_INT_GPU2_IRQ 84 | 315 | #define MX53_INT_GPU2_IRQ 84 |
316 | #define MX53_INT_GPU2_BUSY 85 | 316 | #define MX53_INT_GPU2_BUSY 85 |
317 | #define MX53_INT_RESV86 86 | 317 | #define MX53_INT_UART5 86 |
318 | #define MX53_INT_FEC 87 | 318 | #define MX53_INT_FEC 87 |
319 | #define MX53_INT_OWIRE 88 | 319 | #define MX53_INT_OWIRE 88 |
320 | #define MX53_INT_CTI1_TG2 89 | 320 | #define MX53_INT_CTI1_TG2 89 |
diff --git a/arch/arm/plat-mxc/include/mach/mxc.h b/arch/arm/plat-mxc/include/mach/mxc.h index 4ac53ce97c24..09879235a9f5 100644 --- a/arch/arm/plat-mxc/include/mach/mxc.h +++ b/arch/arm/plat-mxc/include/mach/mxc.h | |||
@@ -68,7 +68,7 @@ | |||
68 | extern unsigned int __mxc_cpu_type; | 68 | extern unsigned int __mxc_cpu_type; |
69 | #endif | 69 | #endif |
70 | 70 | ||
71 | #ifdef CONFIG_ARCH_MX1 | 71 | #ifdef CONFIG_SOC_IMX1 |
72 | # ifdef mxc_cpu_type | 72 | # ifdef mxc_cpu_type |
73 | # undef mxc_cpu_type | 73 | # undef mxc_cpu_type |
74 | # define mxc_cpu_type __mxc_cpu_type | 74 | # define mxc_cpu_type __mxc_cpu_type |
@@ -80,7 +80,7 @@ extern unsigned int __mxc_cpu_type; | |||
80 | # define cpu_is_mx1() (0) | 80 | # define cpu_is_mx1() (0) |
81 | #endif | 81 | #endif |
82 | 82 | ||
83 | #ifdef CONFIG_MACH_MX21 | 83 | #ifdef CONFIG_SOC_IMX21 |
84 | # ifdef mxc_cpu_type | 84 | # ifdef mxc_cpu_type |
85 | # undef mxc_cpu_type | 85 | # undef mxc_cpu_type |
86 | # define mxc_cpu_type __mxc_cpu_type | 86 | # define mxc_cpu_type __mxc_cpu_type |
@@ -92,7 +92,7 @@ extern unsigned int __mxc_cpu_type; | |||
92 | # define cpu_is_mx21() (0) | 92 | # define cpu_is_mx21() (0) |
93 | #endif | 93 | #endif |
94 | 94 | ||
95 | #ifdef CONFIG_ARCH_MX25 | 95 | #ifdef CONFIG_SOC_IMX25 |
96 | # ifdef mxc_cpu_type | 96 | # ifdef mxc_cpu_type |
97 | # undef mxc_cpu_type | 97 | # undef mxc_cpu_type |
98 | # define mxc_cpu_type __mxc_cpu_type | 98 | # define mxc_cpu_type __mxc_cpu_type |
@@ -104,7 +104,7 @@ extern unsigned int __mxc_cpu_type; | |||
104 | # define cpu_is_mx25() (0) | 104 | # define cpu_is_mx25() (0) |
105 | #endif | 105 | #endif |
106 | 106 | ||
107 | #ifdef CONFIG_MACH_MX27 | 107 | #ifdef CONFIG_SOC_IMX27 |
108 | # ifdef mxc_cpu_type | 108 | # ifdef mxc_cpu_type |
109 | # undef mxc_cpu_type | 109 | # undef mxc_cpu_type |
110 | # define mxc_cpu_type __mxc_cpu_type | 110 | # define mxc_cpu_type __mxc_cpu_type |
diff --git a/arch/arm/plat-mxc/include/mach/sdma.h b/arch/arm/plat-mxc/include/mach/sdma.h index 913e0432e40e..f495c87c113f 100644 --- a/arch/arm/plat-mxc/include/mach/sdma.h +++ b/arch/arm/plat-mxc/include/mach/sdma.h | |||
@@ -49,14 +49,12 @@ struct sdma_script_start_addrs { | |||
49 | * struct sdma_platform_data - platform specific data for SDMA engine | 49 | * struct sdma_platform_data - platform specific data for SDMA engine |
50 | * | 50 | * |
51 | * @sdma_version The version of this SDMA engine | 51 | * @sdma_version The version of this SDMA engine |
52 | * @cpu_name used to generate the firmware name | 52 | * @fw_name The firmware name |
53 | * @to_version CPU Tape out version | ||
54 | * @script_addrs SDMA scripts addresses in SDMA ROM | 53 | * @script_addrs SDMA scripts addresses in SDMA ROM |
55 | */ | 54 | */ |
56 | struct sdma_platform_data { | 55 | struct sdma_platform_data { |
57 | int sdma_version; | 56 | int sdma_version; |
58 | char *cpu_name; | 57 | char *fw_name; |
59 | int to_version; | ||
60 | struct sdma_script_start_addrs *script_addrs; | 58 | struct sdma_script_start_addrs *script_addrs; |
61 | }; | 59 | }; |
62 | 60 | ||
diff --git a/arch/arm/plat-mxc/include/mach/timex.h b/arch/arm/plat-mxc/include/mach/timex.h index d61d5c74817c..10343d1f87e1 100644 --- a/arch/arm/plat-mxc/include/mach/timex.h +++ b/arch/arm/plat-mxc/include/mach/timex.h | |||
@@ -16,16 +16,7 @@ | |||
16 | #ifndef __ASM_ARCH_MXC_TIMEX_H__ | 16 | #ifndef __ASM_ARCH_MXC_TIMEX_H__ |
17 | #define __ASM_ARCH_MXC_TIMEX_H__ | 17 | #define __ASM_ARCH_MXC_TIMEX_H__ |
18 | 18 | ||
19 | #if defined CONFIG_ARCH_MX1 | 19 | /* Bogus value */ |
20 | #define CLOCK_TICK_RATE 16000000 | 20 | #define CLOCK_TICK_RATE 12345678 |
21 | #elif defined CONFIG_ARCH_MX2 | ||
22 | #define CLOCK_TICK_RATE 13300000 | ||
23 | #elif defined CONFIG_ARCH_MX3 | ||
24 | #define CLOCK_TICK_RATE 16625000 | ||
25 | #elif defined CONFIG_ARCH_MX25 | ||
26 | #define CLOCK_TICK_RATE 16000000 | ||
27 | #elif defined CONFIG_ARCH_MX5 | ||
28 | #define CLOCK_TICK_RATE 8000000 | ||
29 | #endif | ||
30 | 21 | ||
31 | #endif /* __ASM_ARCH_MXC_TIMEX_H__ */ | 22 | #endif /* __ASM_ARCH_MXC_TIMEX_H__ */ |
diff --git a/arch/arm/plat-mxc/include/mach/uncompress.h b/arch/arm/plat-mxc/include/mach/uncompress.h index d85e2d1c0324..88fd40452567 100644 --- a/arch/arm/plat-mxc/include/mach/uncompress.h +++ b/arch/arm/plat-mxc/include/mach/uncompress.h | |||
@@ -117,6 +117,7 @@ static __inline__ void __arch_decomp_setup(unsigned long arch_id) | |||
117 | case MACH_TYPE_MX53_EVK: | 117 | case MACH_TYPE_MX53_EVK: |
118 | case MACH_TYPE_MX53_LOCO: | 118 | case MACH_TYPE_MX53_LOCO: |
119 | case MACH_TYPE_MX53_SMD: | 119 | case MACH_TYPE_MX53_SMD: |
120 | case MACH_TYPE_MX53_ARD: | ||
120 | uart_base = MX53_UART1_BASE_ADDR; | 121 | uart_base = MX53_UART1_BASE_ADDR; |
121 | break; | 122 | break; |
122 | default: | 123 | default: |