diff options
Diffstat (limited to 'arch/arm/plat-mxc/include/mach')
-rw-r--r-- | arch/arm/plat-mxc/include/mach/audmux.h | 10 | ||||
-rw-r--r-- | arch/arm/plat-mxc/include/mach/iomux-mx2x.h | 12 | ||||
-rw-r--r-- | arch/arm/plat-mxc/include/mach/mx50.h | 4 | ||||
-rw-r--r-- | arch/arm/plat-mxc/include/mach/mx51.h | 1 | ||||
-rw-r--r-- | arch/arm/plat-mxc/include/mach/mxc.h | 23 | ||||
-rw-r--r-- | arch/arm/plat-mxc/include/mach/system.h | 6 |
6 files changed, 48 insertions, 8 deletions
diff --git a/arch/arm/plat-mxc/include/mach/audmux.h b/arch/arm/plat-mxc/include/mach/audmux.h index 5cd6466964af..6fda788ed0e9 100644 --- a/arch/arm/plat-mxc/include/mach/audmux.h +++ b/arch/arm/plat-mxc/include/mach/audmux.h | |||
@@ -15,6 +15,14 @@ | |||
15 | #define MX31_AUDMUX_PORT5_SSI_PINS_5 4 | 15 | #define MX31_AUDMUX_PORT5_SSI_PINS_5 4 |
16 | #define MX31_AUDMUX_PORT6_SSI_PINS_6 5 | 16 | #define MX31_AUDMUX_PORT6_SSI_PINS_6 5 |
17 | 17 | ||
18 | #define MX51_AUDMUX_PORT1_SSI0 0 | ||
19 | #define MX51_AUDMUX_PORT2_SSI1 1 | ||
20 | #define MX51_AUDMUX_PORT3 2 | ||
21 | #define MX51_AUDMUX_PORT4 3 | ||
22 | #define MX51_AUDMUX_PORT5 4 | ||
23 | #define MX51_AUDMUX_PORT6 5 | ||
24 | #define MX51_AUDMUX_PORT7 6 | ||
25 | |||
18 | /* Register definitions for the i.MX21/27 Digital Audio Multiplexer */ | 26 | /* Register definitions for the i.MX21/27 Digital Audio Multiplexer */ |
19 | #define MXC_AUDMUX_V1_PCR_INMMASK(x) ((x) & 0xff) | 27 | #define MXC_AUDMUX_V1_PCR_INMMASK(x) ((x) & 0xff) |
20 | #define MXC_AUDMUX_V1_PCR_INMEN (1 << 8) | 28 | #define MXC_AUDMUX_V1_PCR_INMEN (1 << 8) |
@@ -28,7 +36,7 @@ | |||
28 | #define MXC_AUDMUX_V1_PCR_TCLKDIR (1 << 30) | 36 | #define MXC_AUDMUX_V1_PCR_TCLKDIR (1 << 30) |
29 | #define MXC_AUDMUX_V1_PCR_TFSDIR (1 << 31) | 37 | #define MXC_AUDMUX_V1_PCR_TFSDIR (1 << 31) |
30 | 38 | ||
31 | /* Register definitions for the i.MX25/31/35 Digital Audio Multiplexer */ | 39 | /* Register definitions for the i.MX25/31/35/51 Digital Audio Multiplexer */ |
32 | #define MXC_AUDMUX_V2_PTCR_TFSDIR (1 << 31) | 40 | #define MXC_AUDMUX_V2_PTCR_TFSDIR (1 << 31) |
33 | #define MXC_AUDMUX_V2_PTCR_TFSEL(x) (((x) & 0xf) << 27) | 41 | #define MXC_AUDMUX_V2_PTCR_TFSEL(x) (((x) & 0xf) << 27) |
34 | #define MXC_AUDMUX_V2_PTCR_TCLKDIR (1 << 26) | 42 | #define MXC_AUDMUX_V2_PTCR_TCLKDIR (1 << 26) |
diff --git a/arch/arm/plat-mxc/include/mach/iomux-mx2x.h b/arch/arm/plat-mxc/include/mach/iomux-mx2x.h index c4f116d214f2..7a9b20abda09 100644 --- a/arch/arm/plat-mxc/include/mach/iomux-mx2x.h +++ b/arch/arm/plat-mxc/include/mach/iomux-mx2x.h | |||
@@ -90,12 +90,12 @@ | |||
90 | #define PC31_PF_SSI3_CLK (GPIO_PORTC | GPIO_PF | GPIO_IN | 31) | 90 | #define PC31_PF_SSI3_CLK (GPIO_PORTC | GPIO_PF | GPIO_IN | 31) |
91 | #define PD17_PF_I2C_DATA (GPIO_PORTD | GPIO_PF | GPIO_OUT | 17) | 91 | #define PD17_PF_I2C_DATA (GPIO_PORTD | GPIO_PF | GPIO_OUT | 17) |
92 | #define PD18_PF_I2C_CLK (GPIO_PORTD | GPIO_PF | GPIO_OUT | 18) | 92 | #define PD18_PF_I2C_CLK (GPIO_PORTD | GPIO_PF | GPIO_OUT | 18) |
93 | #define PD19_PF_CSPI2_SS2 (GPIO_PORTD | GPIO_PF | 19) | 93 | #define PD19_PF_CSPI2_SS2 (GPIO_PORTD | GPIO_PF | GPIO_OUT | 19) |
94 | #define PD20_PF_CSPI2_SS1 (GPIO_PORTD | GPIO_PF | 20) | 94 | #define PD20_PF_CSPI2_SS1 (GPIO_PORTD | GPIO_PF | GPIO_OUT | 20) |
95 | #define PD21_PF_CSPI2_SS0 (GPIO_PORTD | GPIO_PF | 21) | 95 | #define PD21_PF_CSPI2_SS0 (GPIO_PORTD | GPIO_PF | GPIO_OUT | 21) |
96 | #define PD22_PF_CSPI2_SCLK (GPIO_PORTD | GPIO_PF | 22) | 96 | #define PD22_PF_CSPI2_SCLK (GPIO_PORTD | GPIO_PF | GPIO_OUT | 22) |
97 | #define PD23_PF_CSPI2_MISO (GPIO_PORTD | GPIO_PF | 23) | 97 | #define PD23_PF_CSPI2_MISO (GPIO_PORTD | GPIO_PF | GPIO_IN | 23) |
98 | #define PD24_PF_CSPI2_MOSI (GPIO_PORTD | GPIO_PF | 24) | 98 | #define PD24_PF_CSPI2_MOSI (GPIO_PORTD | GPIO_PF | GPIO_OUT | 24) |
99 | #define PD25_PF_CSPI1_RDY (GPIO_PORTD | GPIO_PF | GPIO_OUT | 25) | 99 | #define PD25_PF_CSPI1_RDY (GPIO_PORTD | GPIO_PF | GPIO_OUT | 25) |
100 | #define PD26_PF_CSPI1_SS2 (GPIO_PORTD | GPIO_PF | GPIO_OUT | 26) | 100 | #define PD26_PF_CSPI1_SS2 (GPIO_PORTD | GPIO_PF | GPIO_OUT | 26) |
101 | #define PD27_PF_CSPI1_SS1 (GPIO_PORTD | GPIO_PF | GPIO_OUT | 27) | 101 | #define PD27_PF_CSPI1_SS1 (GPIO_PORTD | GPIO_PF | GPIO_OUT | 27) |
diff --git a/arch/arm/plat-mxc/include/mach/mx50.h b/arch/arm/plat-mxc/include/mach/mx50.h index aaec2a6e7b3a..5f2da75a47f4 100644 --- a/arch/arm/plat-mxc/include/mach/mx50.h +++ b/arch/arm/plat-mxc/include/mach/mx50.h | |||
@@ -282,4 +282,8 @@ | |||
282 | #define MX50_INT_APBHDMA_CHAN6 116 | 282 | #define MX50_INT_APBHDMA_CHAN6 116 |
283 | #define MX50_INT_APBHDMA_CHAN7 117 | 283 | #define MX50_INT_APBHDMA_CHAN7 117 |
284 | 284 | ||
285 | #if !defined(__ASSEMBLY__) && !defined(__MXC_BOOT_UNCOMPRESS) | ||
286 | extern int mx50_revision(void); | ||
287 | #endif | ||
288 | |||
285 | #endif /* ifndef __MACH_MX50_H__ */ | 289 | #endif /* ifndef __MACH_MX50_H__ */ |
diff --git a/arch/arm/plat-mxc/include/mach/mx51.h b/arch/arm/plat-mxc/include/mach/mx51.h index 1eb339e6c857..dede19a766ff 100644 --- a/arch/arm/plat-mxc/include/mach/mx51.h +++ b/arch/arm/plat-mxc/include/mach/mx51.h | |||
@@ -347,6 +347,7 @@ | |||
347 | 347 | ||
348 | #if !defined(__ASSEMBLY__) && !defined(__MXC_BOOT_UNCOMPRESS) | 348 | #if !defined(__ASSEMBLY__) && !defined(__MXC_BOOT_UNCOMPRESS) |
349 | extern int mx51_revision(void); | 349 | extern int mx51_revision(void); |
350 | extern void mx51_display_revision(void); | ||
350 | #endif | 351 | #endif |
351 | 352 | ||
352 | /* tape-out 1 defines */ | 353 | /* tape-out 1 defines */ |
diff --git a/arch/arm/plat-mxc/include/mach/mxc.h b/arch/arm/plat-mxc/include/mach/mxc.h index 7e072637eefa..1aea818d9d31 100644 --- a/arch/arm/plat-mxc/include/mach/mxc.h +++ b/arch/arm/plat-mxc/include/mach/mxc.h | |||
@@ -51,6 +51,20 @@ | |||
51 | #define IMX_CHIP_REVISION_3_3 0x33 | 51 | #define IMX_CHIP_REVISION_3_3 0x33 |
52 | #define IMX_CHIP_REVISION_UNKNOWN 0xff | 52 | #define IMX_CHIP_REVISION_UNKNOWN 0xff |
53 | 53 | ||
54 | #define IMX_CHIP_REVISION_1_0_STRING "1.0" | ||
55 | #define IMX_CHIP_REVISION_1_1_STRING "1.1" | ||
56 | #define IMX_CHIP_REVISION_1_2_STRING "1.2" | ||
57 | #define IMX_CHIP_REVISION_1_3_STRING "1.3" | ||
58 | #define IMX_CHIP_REVISION_2_0_STRING "2.0" | ||
59 | #define IMX_CHIP_REVISION_2_1_STRING "2.1" | ||
60 | #define IMX_CHIP_REVISION_2_2_STRING "2.2" | ||
61 | #define IMX_CHIP_REVISION_2_3_STRING "2.3" | ||
62 | #define IMX_CHIP_REVISION_3_0_STRING "3.0" | ||
63 | #define IMX_CHIP_REVISION_3_1_STRING "3.1" | ||
64 | #define IMX_CHIP_REVISION_3_2_STRING "3.2" | ||
65 | #define IMX_CHIP_REVISION_3_3_STRING "3.3" | ||
66 | #define IMX_CHIP_REVISION_UNKNOWN_STRING "unknown" | ||
67 | |||
54 | #ifndef __ASSEMBLY__ | 68 | #ifndef __ASSEMBLY__ |
55 | extern unsigned int __mxc_cpu_type; | 69 | extern unsigned int __mxc_cpu_type; |
56 | #endif | 70 | #endif |
@@ -181,6 +195,15 @@ struct cpu_op { | |||
181 | u32 cpu_rate; | 195 | u32 cpu_rate; |
182 | }; | 196 | }; |
183 | 197 | ||
198 | int tzic_enable_wake(int is_idle); | ||
199 | enum mxc_cpu_pwr_mode { | ||
200 | WAIT_CLOCKED, /* wfi only */ | ||
201 | WAIT_UNCLOCKED, /* WAIT */ | ||
202 | WAIT_UNCLOCKED_POWER_OFF, /* WAIT + SRPG */ | ||
203 | STOP_POWER_ON, /* just STOP */ | ||
204 | STOP_POWER_OFF, /* STOP + SRPG */ | ||
205 | }; | ||
206 | |||
184 | extern struct cpu_op *(*get_cpu_op)(int *op); | 207 | extern struct cpu_op *(*get_cpu_op)(int *op); |
185 | #endif | 208 | #endif |
186 | 209 | ||
diff --git a/arch/arm/plat-mxc/include/mach/system.h b/arch/arm/plat-mxc/include/mach/system.h index 95be51bfe9a9..0417da9f710d 100644 --- a/arch/arm/plat-mxc/include/mach/system.h +++ b/arch/arm/plat-mxc/include/mach/system.h | |||
@@ -20,6 +20,8 @@ | |||
20 | #include <mach/hardware.h> | 20 | #include <mach/hardware.h> |
21 | #include <mach/common.h> | 21 | #include <mach/common.h> |
22 | 22 | ||
23 | extern void mx5_cpu_lp_set(enum mxc_cpu_pwr_mode mode); | ||
24 | |||
23 | static inline void arch_idle(void) | 25 | static inline void arch_idle(void) |
24 | { | 26 | { |
25 | #ifdef CONFIG_ARCH_MXC91231 | 27 | #ifdef CONFIG_ARCH_MXC91231 |
@@ -54,7 +56,9 @@ static inline void arch_idle(void) | |||
54 | "orr %0, %0, #0x00000004\n" | 56 | "orr %0, %0, #0x00000004\n" |
55 | "mcr p15, 0, %0, c1, c0, 0\n" | 57 | "mcr p15, 0, %0, c1, c0, 0\n" |
56 | : "=r" (reg)); | 58 | : "=r" (reg)); |
57 | } else | 59 | } else if (cpu_is_mx51()) |
60 | mx5_cpu_lp_set(WAIT_UNCLOCKED_POWER_OFF); | ||
61 | else | ||
58 | cpu_do_idle(); | 62 | cpu_do_idle(); |
59 | } | 63 | } |
60 | 64 | ||