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-rw-r--r--arch/arm/plat-mxc/include/mach/devices-common.h10
-rw-r--r--arch/arm/plat-mxc/include/mach/mx25.h4
-rw-r--r--arch/arm/plat-mxc/include/mach/mx35.h6
-rw-r--r--arch/arm/plat-mxc/include/mach/mx51.h16
4 files changed, 20 insertions, 16 deletions
diff --git a/arch/arm/plat-mxc/include/mach/devices-common.h b/arch/arm/plat-mxc/include/mach/devices-common.h
index 049897880403..86d7575a564d 100644
--- a/arch/arm/plat-mxc/include/mach/devices-common.h
+++ b/arch/arm/plat-mxc/include/mach/devices-common.h
@@ -108,7 +108,11 @@ struct platform_device *__init imx_add_spi_imx(
108 const struct spi_imx_master *pdata); 108 const struct spi_imx_master *pdata);
109 109
110#include <mach/esdhc.h> 110#include <mach/esdhc.h>
111struct platform_device *__init imx_add_esdhc(int id, 111struct imx_esdhc_imx_data {
112 resource_size_t iobase, resource_size_t iosize, 112 int id;
113 resource_size_t irq, 113 resource_size_t iobase;
114 resource_size_t irq;
115};
116struct platform_device *__init imx_add_esdhc(
117 const struct imx_esdhc_imx_data *data,
114 const struct esdhc_platform_data *pdata); 118 const struct esdhc_platform_data *pdata);
diff --git a/arch/arm/plat-mxc/include/mach/mx25.h b/arch/arm/plat-mxc/include/mach/mx25.h
index 4d31f6806ff4..cf46a45b0d4e 100644
--- a/arch/arm/plat-mxc/include/mach/mx25.h
+++ b/arch/arm/plat-mxc/include/mach/mx25.h
@@ -62,8 +62,8 @@
62#define MX25_INT_I2C1 3 62#define MX25_INT_I2C1 3
63#define MX25_INT_I2C2 4 63#define MX25_INT_I2C2 4
64#define MX25_INT_UART4 5 64#define MX25_INT_UART4 5
65#define MX25_INT_MMC_SDHC2 8 65#define MX25_INT_ESDHC2 8
66#define MX25_INT_MMC_SDHC1 9 66#define MX25_INT_ESDHC1 9
67#define MX25_INT_I2C3 10 67#define MX25_INT_I2C3 10
68#define MX25_INT_SSI2 11 68#define MX25_INT_SSI2 11
69#define MX25_INT_SSI1 12 69#define MX25_INT_SSI1 12
diff --git a/arch/arm/plat-mxc/include/mach/mx35.h b/arch/arm/plat-mxc/include/mach/mx35.h
index cb071b7b17e5..ff905cb32458 100644
--- a/arch/arm/plat-mxc/include/mach/mx35.h
+++ b/arch/arm/plat-mxc/include/mach/mx35.h
@@ -128,9 +128,9 @@
128#define MX35_INT_I2C3 3 128#define MX35_INT_I2C3 3
129#define MX35_INT_I2C2 4 129#define MX35_INT_I2C2 4
130#define MX35_INT_RTIC 6 130#define MX35_INT_RTIC 6
131#define MX35_INT_MMC_SDHC1 7 131#define MX35_INT_ESDHC1 7
132#define MX35_INT_MMC_SDHC2 8 132#define MX35_INT_ESDHC2 8
133#define MX35_INT_MMC_SDHC3 9 133#define MX35_INT_ESDHC3 9
134#define MX35_INT_I2C1 10 134#define MX35_INT_I2C1 10
135#define MX35_INT_SSI1 11 135#define MX35_INT_SSI1 11
136#define MX35_INT_SSI2 12 136#define MX35_INT_SSI2 12
diff --git a/arch/arm/plat-mxc/include/mach/mx51.h b/arch/arm/plat-mxc/include/mach/mx51.h
index c54b5c32d82e..2af7a1056fc1 100644
--- a/arch/arm/plat-mxc/include/mach/mx51.h
+++ b/arch/arm/plat-mxc/include/mach/mx51.h
@@ -64,13 +64,13 @@
64#define MX51_SPBA0_BASE_ADDR_VIRT 0xfb100000 64#define MX51_SPBA0_BASE_ADDR_VIRT 0xfb100000
65#define MX51_SPBA0_SIZE SZ_1M 65#define MX51_SPBA0_SIZE SZ_1M
66 66
67#define MX51_MMC_SDHC1_BASE_ADDR (MX51_SPBA0_BASE_ADDR + 0x04000) 67#define MX51_ESDHC1_BASE_ADDR (MX51_SPBA0_BASE_ADDR + 0x04000)
68#define MX51_MMC_SDHC2_BASE_ADDR (MX51_SPBA0_BASE_ADDR + 0x08000) 68#define MX51_ESDHC2_BASE_ADDR (MX51_SPBA0_BASE_ADDR + 0x08000)
69#define MX51_UART3_BASE_ADDR (MX51_SPBA0_BASE_ADDR + 0x0c000) 69#define MX51_UART3_BASE_ADDR (MX51_SPBA0_BASE_ADDR + 0x0c000)
70#define MX51_ECSPI1_BASE_ADDR (MX51_SPBA0_BASE_ADDR + 0x10000) 70#define MX51_ECSPI1_BASE_ADDR (MX51_SPBA0_BASE_ADDR + 0x10000)
71#define MX51_SSI2_BASE_ADDR (MX51_SPBA0_BASE_ADDR + 0x14000) 71#define MX51_SSI2_BASE_ADDR (MX51_SPBA0_BASE_ADDR + 0x14000)
72#define MX51_MMC_SDHC3_BASE_ADDR (MX51_SPBA0_BASE_ADDR + 0x20000) 72#define MX51_ESDHC3_BASE_ADDR (MX51_SPBA0_BASE_ADDR + 0x20000)
73#define MX51_MMC_SDHC4_BASE_ADDR (MX51_SPBA0_BASE_ADDR + 0x24000) 73#define MX51_ESDHC4_BASE_ADDR (MX51_SPBA0_BASE_ADDR + 0x24000)
74#define MX51_SPDIF_BASE_ADDR (MX51_SPBA0_BASE_ADDR + 0x28000) 74#define MX51_SPDIF_BASE_ADDR (MX51_SPBA0_BASE_ADDR + 0x28000)
75#define MX51_ATA_DMA_BASE_ADDR (MX51_SPBA0_BASE_ADDR + 0x30000) 75#define MX51_ATA_DMA_BASE_ADDR (MX51_SPBA0_BASE_ADDR + 0x30000)
76#define MX51_SLIM_DMA_BASE_ADDR (MX51_SPBA0_BASE_ADDR + 0x34000) 76#define MX51_SLIM_DMA_BASE_ADDR (MX51_SPBA0_BASE_ADDR + 0x34000)
@@ -280,10 +280,10 @@
280 */ 280 */
281#define MX51_MXC_INT_BASE 0 281#define MX51_MXC_INT_BASE 0
282#define MX51_MXC_INT_RESV0 0 282#define MX51_MXC_INT_RESV0 0
283#define MX51_MXC_INT_MMC_SDHC1 1 283#define MX51_INT_ESDHC1 1
284#define MX51_MXC_INT_MMC_SDHC2 2 284#define MX51_INT_ESDHC2 2
285#define MX51_MXC_INT_MMC_SDHC3 3 285#define MX51_INT_ESDHC3 3
286#define MX51_MXC_INT_MMC_SDHC4 4 286#define MX51_INT_ESDHC4 4
287#define MX51_MXC_INT_RESV5 5 287#define MX51_MXC_INT_RESV5 5
288#define MX51_INT_SDMA 6 288#define MX51_INT_SDMA 6
289#define MX51_MXC_INT_IOMUX 7 289#define MX51_MXC_INT_IOMUX 7