diff options
Diffstat (limited to 'arch/arm/plat-mxc/include/mach/system.h')
-rw-r--r-- | arch/arm/plat-mxc/include/mach/system.h | 32 |
1 files changed, 29 insertions, 3 deletions
diff --git a/arch/arm/plat-mxc/include/mach/system.h b/arch/arm/plat-mxc/include/mach/system.h index 4acd1143a9bd..95be51bfe9a9 100644 --- a/arch/arm/plat-mxc/include/mach/system.h +++ b/arch/arm/plat-mxc/include/mach/system.h | |||
@@ -1,7 +1,7 @@ | |||
1 | /* | 1 | /* |
2 | * Copyright (C) 1999 ARM Limited | 2 | * Copyright (C) 1999 ARM Limited |
3 | * Copyright (C) 2000 Deep Blue Solutions Ltd | 3 | * Copyright (C) 2000 Deep Blue Solutions Ltd |
4 | * Copyright 2004-2007 Freescale Semiconductor, Inc. All Rights Reserved. | 4 | * Copyright 2004-2008 Freescale Semiconductor, Inc. All Rights Reserved. |
5 | * | 5 | * |
6 | * This program is free software; you can redistribute it and/or modify | 6 | * This program is free software; you can redistribute it and/or modify |
7 | * it under the terms of the GNU General Public License as published by | 7 | * it under the terms of the GNU General Public License as published by |
@@ -28,8 +28,34 @@ static inline void arch_idle(void) | |||
28 | mxc91231_prepare_idle(); | 28 | mxc91231_prepare_idle(); |
29 | } | 29 | } |
30 | #endif | 30 | #endif |
31 | 31 | /* fix i.MX31 errata TLSbo65953 and i.MX35 errata ENGcm09472 */ | |
32 | cpu_do_idle(); | 32 | if (cpu_is_mx31() || cpu_is_mx35()) { |
33 | unsigned long reg = 0; | ||
34 | __asm__ __volatile__( | ||
35 | /* disable I and D cache */ | ||
36 | "mrc p15, 0, %0, c1, c0, 0\n" | ||
37 | "bic %0, %0, #0x00001000\n" | ||
38 | "bic %0, %0, #0x00000004\n" | ||
39 | "mcr p15, 0, %0, c1, c0, 0\n" | ||
40 | /* invalidate I cache */ | ||
41 | "mov %0, #0\n" | ||
42 | "mcr p15, 0, %0, c7, c5, 0\n" | ||
43 | /* clear and invalidate D cache */ | ||
44 | "mov %0, #0\n" | ||
45 | "mcr p15, 0, %0, c7, c14, 0\n" | ||
46 | /* WFI */ | ||
47 | "mov %0, #0\n" | ||
48 | "mcr p15, 0, %0, c7, c0, 4\n" | ||
49 | "nop\n" "nop\n" "nop\n" "nop\n" | ||
50 | "nop\n" "nop\n" "nop\n" | ||
51 | /* enable I and D cache */ | ||
52 | "mrc p15, 0, %0, c1, c0, 0\n" | ||
53 | "orr %0, %0, #0x00001000\n" | ||
54 | "orr %0, %0, #0x00000004\n" | ||
55 | "mcr p15, 0, %0, c1, c0, 0\n" | ||
56 | : "=r" (reg)); | ||
57 | } else | ||
58 | cpu_do_idle(); | ||
33 | } | 59 | } |
34 | 60 | ||
35 | void arch_reset(char mode, const char *cmd); | 61 | void arch_reset(char mode, const char *cmd); |