1 files changed, 109 insertions, 108 deletions

diff --git a/arch/arm/plat-mxc/include/mach/mx53.h b/arch/arm/plat-mxc/include/mach/mx53.h
index a37e8c353994..f829d1c22501 100644
--- a/arch/arm/plat-mxc/include/mach/mx53.h
+++ b/arch/arm/plat-mxc/include/mach/mx53.h
@@ -229,113 +229,114 @@
 /*
  * Interrupt numbers
  */
-#define MX53_INT_RESV0          0
-#define MX53_INT_ESDHC1 1
-#define MX53_INT_ESDHC2 2
-#define MX53_INT_ESDHC3 3
-#define MX53_INT_ESDHC4 4
-#define MX53_INT_DAP    5
-#define MX53_INT_SDMA   6
-#define MX53_INT_IOMUX  7
-#define MX53_INT_NFC    8
-#define MX53_INT_VPU    9
-#define MX53_INT_IPU_ERR        10
-#define MX53_INT_IPU_SYN        11
-#define MX53_INT_GPU    12
-#define MX53_INT_UART4  13
-#define MX53_INT_USB_H1 14
-#define MX53_INT_EMI    15
-#define MX53_INT_USB_H2 16
-#define MX53_INT_USB_H3 17
-#define MX53_INT_USB_OTG        18
-#define MX53_INT_SAHARA_H0      19
-#define MX53_INT_SAHARA_H1      20
-#define MX53_INT_SCC_SMN        21
-#define MX53_INT_SCC_STZ        22
-#define MX53_INT_SCC_SCM        23
-#define MX53_INT_SRTC_NTZ       24
-#define MX53_INT_SRTC_TZ        25
-#define MX53_INT_RTIC   26
-#define MX53_INT_CSU    27
-#define MX53_INT_SATA   28
-#define MX53_INT_SSI1   29
-#define MX53_INT_SSI2   30
-#define MX53_INT_UART1  31
-#define MX53_INT_UART2  32
-#define MX53_INT_UART3  33
-#define MX53_INT_RTC    34
-#define MX53_INT_PTP    35
-#define MX53_INT_ECSPI1 36
-#define MX53_INT_ECSPI2 37
-#define MX53_INT_CSPI   38
-#define MX53_INT_GPT    39
-#define MX53_INT_EPIT1  40
-#define MX53_INT_EPIT2  41
-#define MX53_INT_GPIO1_INT7     42
-#define MX53_INT_GPIO1_INT6     43
-#define MX53_INT_GPIO1_INT5     44
-#define MX53_INT_GPIO1_INT4     45
-#define MX53_INT_GPIO1_INT3     46
-#define MX53_INT_GPIO1_INT2     47
-#define MX53_INT_GPIO1_INT1     48
-#define MX53_INT_GPIO1_INT0     49
-#define MX53_INT_GPIO1_LOW      50
-#define MX53_INT_GPIO1_HIGH     51
-#define MX53_INT_GPIO2_LOW      52
-#define MX53_INT_GPIO2_HIGH     53
-#define MX53_INT_GPIO3_LOW      54
-#define MX53_INT_GPIO3_HIGH     55
-#define MX53_INT_GPIO4_LOW      56
-#define MX53_INT_GPIO4_HIGH     57
-#define MX53_INT_WDOG1  58
-#define MX53_INT_WDOG2  59
-#define MX53_INT_KPP    60
-#define MX53_INT_PWM1   61
-#define MX53_INT_I2C1   62
-#define MX53_INT_I2C2   63
-#define MX53_INT_I2C3   64
-#define MX53_INT_MLB    65
-#define MX53_INT_ASRC   66
-#define MX53_INT_SPDIF  67
-#define MX53_INT_SIM_DAT        68
-#define MX53_INT_IIM    69
-#define MX53_INT_ATA    70
-#define MX53_INT_CCM1   71
-#define MX53_INT_CCM2   72
-#define MX53_INT_GPC1   73
-#define MX53_INT_GPC2   74
-#define MX53_INT_SRC    75
-#define MX53_INT_NM             76
-#define MX53_INT_PMU    77
-#define MX53_INT_CTI_IRQ        78
-#define MX53_INT_CTI1_TG0       79
-#define MX53_INT_CTI1_TG1       80
-#define MX53_INT_ESAI   81
-#define MX53_INT_CAN1   82
-#define MX53_INT_CAN2   83
-#define MX53_INT_GPU2_IRQ       84
-#define MX53_INT_GPU2_BUSY      85
-#define MX53_INT_UART5  86
-#define MX53_INT_FEC    87
-#define MX53_INT_OWIRE  88
-#define MX53_INT_CTI1_TG2       89
-#define MX53_INT_SJC    90
-#define MX53_INT_TVE    92
-#define MX53_INT_FIRI   93
-#define MX53_INT_PWM2   94
-#define MX53_INT_SLIM_EXP       95
-#define MX53_INT_SSI3   96
-#define MX53_INT_EMI_BOOT       97
-#define MX53_INT_CTI1_TG3       98
-#define MX53_INT_SMC_RX 99
-#define MX53_INT_VPU_IDLE       100
-#define MX53_INT_EMI_NFC        101
-#define MX53_INT_GPU_IDLE       102
-#define MX53_INT_GPIO5_LOW      103
-#define MX53_INT_GPIO5_HIGH     104
-#define MX53_INT_GPIO6_LOW      105
-#define MX53_INT_GPIO6_HIGH     106
-#define MX53_INT_GPIO7_LOW      107
-#define MX53_INT_GPIO7_HIGH     108
+#include <asm/irq.h>
+#define MX53_INT_RESV0          (NR_IRQS_LEGACY + 0)
+#define MX53_INT_ESDHC1         (NR_IRQS_LEGACY + 1)
+#define MX53_INT_ESDHC2         (NR_IRQS_LEGACY + 2)
+#define MX53_INT_ESDHC3         (NR_IRQS_LEGACY + 3)
+#define MX53_INT_ESDHC4         (NR_IRQS_LEGACY + 4)
+#define MX53_INT_DAP            (NR_IRQS_LEGACY + 5)
+#define MX53_INT_SDMA           (NR_IRQS_LEGACY + 6)
+#define MX53_INT_IOMUX          (NR_IRQS_LEGACY + 7)
+#define MX53_INT_NFC            (NR_IRQS_LEGACY + 8)
+#define MX53_INT_VPU            (NR_IRQS_LEGACY + 9)
+#define MX53_INT_IPU_ERR        (NR_IRQS_LEGACY + 10)
+#define MX53_INT_IPU_SYN        (NR_IRQS_LEGACY + 11)
+#define MX53_INT_GPU            (NR_IRQS_LEGACY + 12)
+#define MX53_INT_UART4          (NR_IRQS_LEGACY + 13)
+#define MX53_INT_USB_H1         (NR_IRQS_LEGACY + 14)
+#define MX53_INT_EMI            (NR_IRQS_LEGACY + 15)
+#define MX53_INT_USB_H2         (NR_IRQS_LEGACY + 16)
+#define MX53_INT_USB_H3         (NR_IRQS_LEGACY + 17)
+#define MX53_INT_USB_OTG        (NR_IRQS_LEGACY + 18)
+#define MX53_INT_SAHARA_H0      (NR_IRQS_LEGACY + 19)
+#define MX53_INT_SAHARA_H1      (NR_IRQS_LEGACY + 20)
+#define MX53_INT_SCC_SMN        (NR_IRQS_LEGACY + 21)
+#define MX53_INT_SCC_STZ        (NR_IRQS_LEGACY + 22)
+#define MX53_INT_SCC_SCM        (NR_IRQS_LEGACY + 23)
+#define MX53_INT_SRTC_NTZ       (NR_IRQS_LEGACY + 24)
+#define MX53_INT_SRTC_TZ        (NR_IRQS_LEGACY + 25)
+#define MX53_INT_RTIC           (NR_IRQS_LEGACY + 26)
+#define MX53_INT_CSU            (NR_IRQS_LEGACY + 27)
+#define MX53_INT_SATA           (NR_IRQS_LEGACY + 28)
+#define MX53_INT_SSI1           (NR_IRQS_LEGACY + 29)
+#define MX53_INT_SSI2           (NR_IRQS_LEGACY + 30)
+#define MX53_INT_UART1          (NR_IRQS_LEGACY + 31)
+#define MX53_INT_UART2          (NR_IRQS_LEGACY + 32)
+#define MX53_INT_UART3          (NR_IRQS_LEGACY + 33)
+#define MX53_INT_RTC            (NR_IRQS_LEGACY + 34)
+#define MX53_INT_PTP            (NR_IRQS_LEGACY + 35)
+#define MX53_INT_ECSPI1         (NR_IRQS_LEGACY + 36)
+#define MX53_INT_ECSPI2         (NR_IRQS_LEGACY + 37)
+#define MX53_INT_CSPI           (NR_IRQS_LEGACY + 38)
+#define MX53_INT_GPT            (NR_IRQS_LEGACY + 39)
+#define MX53_INT_EPIT1          (NR_IRQS_LEGACY + 40)
+#define MX53_INT_EPIT2          (NR_IRQS_LEGACY + 41)
+#define MX53_INT_GPIO1_INT7     (NR_IRQS_LEGACY + 42)
+#define MX53_INT_GPIO1_INT6     (NR_IRQS_LEGACY + 43)
+#define MX53_INT_GPIO1_INT5     (NR_IRQS_LEGACY + 44)
+#define MX53_INT_GPIO1_INT4     (NR_IRQS_LEGACY + 45)
+#define MX53_INT_GPIO1_INT3     (NR_IRQS_LEGACY + 46)
+#define MX53_INT_GPIO1_INT2     (NR_IRQS_LEGACY + 47)
+#define MX53_INT_GPIO1_INT1     (NR_IRQS_LEGACY + 48)
+#define MX53_INT_GPIO1_INT0     (NR_IRQS_LEGACY + 49)
+#define MX53_INT_GPIO1_LOW      (NR_IRQS_LEGACY + 50)
+#define MX53_INT_GPIO1_HIGH     (NR_IRQS_LEGACY + 51)
+#define MX53_INT_GPIO2_LOW      (NR_IRQS_LEGACY + 52)
+#define MX53_INT_GPIO2_HIGH     (NR_IRQS_LEGACY + 53)
+#define MX53_INT_GPIO3_LOW      (NR_IRQS_LEGACY + 54)
+#define MX53_INT_GPIO3_HIGH     (NR_IRQS_LEGACY + 55)
+#define MX53_INT_GPIO4_LOW      (NR_IRQS_LEGACY + 56)
+#define MX53_INT_GPIO4_HIGH     (NR_IRQS_LEGACY + 57)
+#define MX53_INT_WDOG1          (NR_IRQS_LEGACY + 58)
+#define MX53_INT_WDOG2          (NR_IRQS_LEGACY + 59)
+#define MX53_INT_KPP            (NR_IRQS_LEGACY + 60)
+#define MX53_INT_PWM1           (NR_IRQS_LEGACY + 61)
+#define MX53_INT_I2C1           (NR_IRQS_LEGACY + 62)
+#define MX53_INT_I2C2           (NR_IRQS_LEGACY + 63)
+#define MX53_INT_I2C3           (NR_IRQS_LEGACY + 64)
+#define MX53_INT_MLB            (NR_IRQS_LEGACY + 65)
+#define MX53_INT_ASRC           (NR_IRQS_LEGACY + 66)
+#define MX53_INT_SPDIF          (NR_IRQS_LEGACY + 67)
+#define MX53_INT_SIM_DAT        (NR_IRQS_LEGACY + 68)
+#define MX53_INT_IIM            (NR_IRQS_LEGACY + 69)
+#define MX53_INT_ATA            (NR_IRQS_LEGACY + 70)
+#define MX53_INT_CCM1           (NR_IRQS_LEGACY + 71)
+#define MX53_INT_CCM2           (NR_IRQS_LEGACY + 72)
+#define MX53_INT_GPC1           (NR_IRQS_LEGACY + 73)
+#define MX53_INT_GPC2           (NR_IRQS_LEGACY + 74)
+#define MX53_INT_SRC            (NR_IRQS_LEGACY + 75)
+#define MX53_INT_NM             (NR_IRQS_LEGACY + 76)
+#define MX53_INT_PMU            (NR_IRQS_LEGACY + 77)
+#define MX53_INT_CTI_IRQ        (NR_IRQS_LEGACY + 78)
+#define MX53_INT_CTI1_TG0       (NR_IRQS_LEGACY + 79)
+#define MX53_INT_CTI1_TG1       (NR_IRQS_LEGACY + 80)
+#define MX53_INT_ESAI           (NR_IRQS_LEGACY + 81)
+#define MX53_INT_CAN1           (NR_IRQS_LEGACY + 82)
+#define MX53_INT_CAN2           (NR_IRQS_LEGACY + 83)
+#define MX53_INT_GPU2_IRQ       (NR_IRQS_LEGACY + 84)
+#define MX53_INT_GPU2_BUSY      (NR_IRQS_LEGACY + 85)
+#define MX53_INT_UART5          (NR_IRQS_LEGACY + 86)
+#define MX53_INT_FEC            (NR_IRQS_LEGACY + 87)
+#define MX53_INT_OWIRE          (NR_IRQS_LEGACY + 88)
+#define MX53_INT_CTI1_TG2       (NR_IRQS_LEGACY + 89)
+#define MX53_INT_SJC            (NR_IRQS_LEGACY + 90)
+#define MX53_INT_TVE            (NR_IRQS_LEGACY + 92)
+#define MX53_INT_FIRI           (NR_IRQS_LEGACY + 93)
+#define MX53_INT_PWM2           (NR_IRQS_LEGACY + 94)
+#define MX53_INT_SLIM_EXP       (NR_IRQS_LEGACY + 95)
+#define MX53_INT_SSI3           (NR_IRQS_LEGACY + 96)
+#define MX53_INT_EMI_BOOT       (NR_IRQS_LEGACY + 97)
+#define MX53_INT_CTI1_TG3       (NR_IRQS_LEGACY + 98)
+#define MX53_INT_SMC_RX         (NR_IRQS_LEGACY + 99)
+#define MX53_INT_VPU_IDLE       (NR_IRQS_LEGACY + 100)
+#define MX53_INT_EMI_NFC        (NR_IRQS_LEGACY + 101)
+#define MX53_INT_GPU_IDLE       (NR_IRQS_LEGACY + 102)
+#define MX53_INT_GPIO5_LOW      (NR_IRQS_LEGACY + 103)
+#define MX53_INT_GPIO5_HIGH     (NR_IRQS_LEGACY + 104)
+#define MX53_INT_GPIO6_LOW      (NR_IRQS_LEGACY + 105)
+#define MX53_INT_GPIO6_HIGH     (NR_IRQS_LEGACY + 106)
+#define MX53_INT_GPIO7_LOW      (NR_IRQS_LEGACY + 107)
+#define MX53_INT_GPIO7_HIGH     (NR_IRQS_LEGACY + 108)
 
 #endif /* ifndef __MACH_MX53_H__ */