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Diffstat (limited to 'arch/arm/plat-mxc/include/mach/mx25.h')
-rw-r--r--arch/arm/plat-mxc/include/mach/mx25.h50
1 files changed, 41 insertions, 9 deletions
diff --git a/arch/arm/plat-mxc/include/mach/mx25.h b/arch/arm/plat-mxc/include/mach/mx25.h
index 4eb6e334bda5..4a6f800990f8 100644
--- a/arch/arm/plat-mxc/include/mach/mx25.h
+++ b/arch/arm/plat-mxc/include/mach/mx25.h
@@ -11,6 +11,12 @@
11#define MX25_AVIC_BASE_ADDR_VIRT 0xfc400000 11#define MX25_AVIC_BASE_ADDR_VIRT 0xfc400000
12#define MX25_AVIC_SIZE SZ_1M 12#define MX25_AVIC_SIZE SZ_1M
13 13
14#define MX25_I2C1_BASE_ADDR (MX25_AIPS1_BASE_ADDR + 0x80000)
15#define MX25_I2C3_BASE_ADDR (MX25_AIPS1_BASE_ADDR + 0x84000)
16#define MX25_CAN1_BASE_ADDR (MX25_AIPS1_BASE_ADDR + 0x88000)
17#define MX25_CAN2_BASE_ADDR (MX25_AIPS1_BASE_ADDR + 0x8c000)
18#define MX25_I2C2_BASE_ADDR (MX25_AIPS1_BASE_ADDR + 0x98000)
19#define MX25_CSPI1_BASE_ADDR (MX25_AIPS1_BASE_ADDR + 0xa4000)
14#define MX25_IOMUXC_BASE_ADDR (MX25_AIPS1_BASE_ADDR + 0xac000) 20#define MX25_IOMUXC_BASE_ADDR (MX25_AIPS1_BASE_ADDR + 0xac000)
15 21
16#define MX25_CRM_BASE_ADDR (MX25_AIPS2_BASE_ADDR + 0x80000) 22#define MX25_CRM_BASE_ADDR (MX25_AIPS2_BASE_ADDR + 0x80000)
@@ -27,22 +33,48 @@
27 IMX_IO_ADDRESS(x, MX25_AIPS2) ?: \ 33 IMX_IO_ADDRESS(x, MX25_AIPS2) ?: \
28 IMX_IO_ADDRESS(x, MX25_AVIC)) 34 IMX_IO_ADDRESS(x, MX25_AVIC))
29 35
36#define MX25_AIPS1_IO_ADDRESS(x) \
37 (((x) - MX25_AIPS1_BASE_ADDR) + MX25_AIPS1_BASE_ADDR_VIRT)
38
30#define MX25_UART1_BASE_ADDR 0x43f90000 39#define MX25_UART1_BASE_ADDR 0x43f90000
31#define MX25_UART2_BASE_ADDR 0x43f94000 40#define MX25_UART2_BASE_ADDR 0x43f94000
41#define MX25_AUDMUX_BASE_ADDR 0x43fb0000
42#define MX25_UART3_BASE_ADDR 0x5000c000
43#define MX25_UART4_BASE_ADDR 0x50008000
44#define MX25_UART5_BASE_ADDR 0x5002c000
32 45
46#define MX25_CSPI3_BASE_ADDR 0x50004000
47#define MX25_CSPI2_BASE_ADDR 0x50010000
33#define MX25_FEC_BASE_ADDR 0x50038000 48#define MX25_FEC_BASE_ADDR 0x50038000
49#define MX25_SSI2_BASE_ADDR 0x50014000
50#define MX25_SSI1_BASE_ADDR 0x50034000
34#define MX25_NFC_BASE_ADDR 0xbb000000 51#define MX25_NFC_BASE_ADDR 0xbb000000
35#define MX25_DRYICE_BASE_ADDR 0x53ffc000 52#define MX25_DRYICE_BASE_ADDR 0x53ffc000
36#define MX25_LCDC_BASE_ADDR 0x53fbc000 53#define MX25_LCDC_BASE_ADDR 0x53fbc000
54#define MX25_KPP_BASE_ADDR 0x43fa8000
55#define MX25_OTG_BASE_ADDR 0x53ff4000
56#define MX25_CSI_BASE_ADDR 0x53ff8000
37 57
38#define MX25_INT_DRYICE 25 58#define MX25_INT_CSPI3 0
39#define MX25_INT_FEC 57 59#define MX25_INT_I2C1 3
40#define MX25_INT_NANDFC 33 60#define MX25_INT_I2C2 4
41#define MX25_INT_LCDC 39 61#define MX25_INT_UART4 5
42 62#define MX25_INT_I2C3 10
43#if defined(IMX_NEEDS_DEPRECATED_SYMBOLS) 63#define MX25_INT_SSI2 11
44#define UART1_BASE_ADDR MX25_UART1_BASE_ADDR 64#define MX25_INT_SSI1 12
45#define UART2_BASE_ADDR MX25_UART2_BASE_ADDR 65#define MX25_INT_CSPI2 13
46#endif 66#define MX25_INT_CSPI1 14
67#define MX25_INT_CSI 17
68#define MX25_INT_UART3 18
69#define MX25_INT_KPP 24
70#define MX25_INT_DRYICE 25
71#define MX25_INT_UART2 32
72#define MX25_INT_NANDFC 33
73#define MX25_INT_LCDC 39
74#define MX25_INT_UART5 40
75#define MX25_INT_CAN1 43
76#define MX25_INT_CAN2 44
77#define MX25_INT_UART1 45
78#define MX25_INT_FEC 57
47 79
48#endif /* ifndef __MACH_MX25_H__ */ 80#endif /* ifndef __MACH_MX25_H__ */