diff options
Diffstat (limited to 'arch/arm/plat-mxc/include/mach/entry-macro.S')
| -rw-r--r-- | arch/arm/plat-mxc/include/mach/entry-macro.S | 34 |
1 files changed, 33 insertions, 1 deletions
diff --git a/arch/arm/plat-mxc/include/mach/entry-macro.S b/arch/arm/plat-mxc/include/mach/entry-macro.S index 7cf290efe768..aeb08697726b 100644 --- a/arch/arm/plat-mxc/include/mach/entry-macro.S +++ b/arch/arm/plat-mxc/include/mach/entry-macro.S | |||
| @@ -1,6 +1,6 @@ | |||
| 1 | /* | 1 | /* |
| 2 | * Copyright (C) 2007 Lennert Buytenhek <buytenh@wantstofly.org> | 2 | * Copyright (C) 2007 Lennert Buytenhek <buytenh@wantstofly.org> |
| 3 | * Copyright 2004-2007 Freescale Semiconductor, Inc. All Rights Reserved. | 3 | * Copyright 2004-2009 Freescale Semiconductor, Inc. All Rights Reserved. |
| 4 | */ | 4 | */ |
| 5 | 5 | ||
| 6 | /* | 6 | /* |
| @@ -18,11 +18,16 @@ | |||
| 18 | .endm | 18 | .endm |
| 19 | 19 | ||
| 20 | .macro get_irqnr_preamble, base, tmp | 20 | .macro get_irqnr_preamble, base, tmp |
| 21 | #ifndef CONFIG_MXC_TZIC | ||
| 21 | ldr \base, =avic_base | 22 | ldr \base, =avic_base |
| 22 | ldr \base, [\base] | 23 | ldr \base, [\base] |
| 23 | #ifdef CONFIG_MXC_IRQ_PRIOR | 24 | #ifdef CONFIG_MXC_IRQ_PRIOR |
| 24 | ldr r4, [\base, #AVIC_NIMASK] | 25 | ldr r4, [\base, #AVIC_NIMASK] |
| 25 | #endif | 26 | #endif |
| 27 | #elif defined CONFIG_MXC_TZIC | ||
| 28 | ldr \base, =tzic_base | ||
| 29 | ldr \base, [\base] | ||
| 30 | #endif /* CONFIG_MXC_TZIC */ | ||
| 26 | .endm | 31 | .endm |
| 27 | 32 | ||
| 28 | .macro arch_ret_to_user, tmp1, tmp2 | 33 | .macro arch_ret_to_user, tmp1, tmp2 |
| @@ -32,6 +37,7 @@ | |||
| 32 | @ and returns its number in irqnr | 37 | @ and returns its number in irqnr |
| 33 | @ and returns if an interrupt occured in irqstat | 38 | @ and returns if an interrupt occured in irqstat |
| 34 | .macro get_irqnr_and_base, irqnr, irqstat, base, tmp | 39 | .macro get_irqnr_and_base, irqnr, irqstat, base, tmp |
| 40 | #ifndef CONFIG_MXC_TZIC | ||
| 35 | @ Load offset & priority of the highest priority | 41 | @ Load offset & priority of the highest priority |
| 36 | @ interrupt pending from AVIC_NIVECSR | 42 | @ interrupt pending from AVIC_NIVECSR |
| 37 | ldr \irqstat, [\base, #0x40] | 43 | ldr \irqstat, [\base, #0x40] |
| @@ -45,6 +51,32 @@ | |||
| 45 | strne \tmp, [\base, #AVIC_NIMASK] | 51 | strne \tmp, [\base, #AVIC_NIMASK] |
| 46 | streq r4, [\base, #AVIC_NIMASK] | 52 | streq r4, [\base, #AVIC_NIMASK] |
| 47 | #endif | 53 | #endif |
| 54 | #elif defined CONFIG_MXC_TZIC | ||
| 55 | @ Load offset & priority of the highest priority | ||
| 56 | @ interrupt pending. | ||
| 57 | @ 0xD80 is HIPND0 register | ||
| 58 | mov \irqnr, #0 | ||
| 59 | mov \irqstat, #0x0D80 | ||
| 60 | 1000: | ||
| 61 | ldr \tmp, [\irqstat, \base] | ||
| 62 | cmp \tmp, #0 | ||
| 63 | bne 1001f | ||
| 64 | addeq \irqnr, \irqnr, #32 | ||
| 65 | addeq \irqstat, \irqstat, #4 | ||
| 66 | cmp \irqnr, #128 | ||
| 67 | blo 1000b | ||
| 68 | b 2001f | ||
| 69 | 1001: mov \irqstat, #1 | ||
| 70 | 1002: tst \tmp, \irqstat | ||
| 71 | bne 2002f | ||
| 72 | movs \tmp, \tmp, lsr #1 | ||
| 73 | addne \irqnr, \irqnr, #1 | ||
| 74 | bne 1002b | ||
| 75 | 2001: | ||
| 76 | mov \irqnr, #0 | ||
| 77 | 2002: | ||
| 78 | movs \irqnr, \irqnr | ||
| 79 | #endif | ||
| 48 | .endm | 80 | .endm |
| 49 | 81 | ||
| 50 | @ irq priority table (not used) | 82 | @ irq priority table (not used) |
