diff options
Diffstat (limited to 'arch/arm/plat-iop')
-rw-r--r-- | arch/arm/plat-iop/pci.c | 35 |
1 files changed, 20 insertions, 15 deletions
diff --git a/arch/arm/plat-iop/pci.c b/arch/arm/plat-iop/pci.c index 98d01517b563..9e83066cc056 100644 --- a/arch/arm/plat-iop/pci.c +++ b/arch/arm/plat-iop/pci.c | |||
@@ -329,23 +329,28 @@ void __init iop3xx_pci_preinit(void) | |||
329 | iop3xx_atu_setup(); | 329 | iop3xx_atu_setup(); |
330 | } | 330 | } |
331 | 331 | ||
332 | DBG("PCI: Intel 803xx PCI init code.\n"); | 332 | DBG("PCI: Intel IOP3xx PCI init.\n"); |
333 | DBG("PCI: Outbound memory window 0: PCI 0x%08x%08x\n", | ||
334 | *IOP3XX_OUMWTVR0, *IOP3XX_OMWTVR0); | ||
335 | DBG("PCI: Outbound memory window 1: PCI 0x%08x%08x\n", | ||
336 | *IOP3XX_OUMWTVR1, *IOP3XX_OMWTVR1); | ||
337 | DBG("PCI: Outbound IO window: PCI 0x%08x\n", | ||
338 | *IOP3XX_OIOWTVR); | ||
339 | |||
340 | DBG("PCI: Inbound memory window 0: PCI 0x%08x%08x 0x%08x -> 0x%08x\n", | ||
341 | *IOP3XX_IAUBAR0, *IOP3XX_IABAR0, *IOP3XX_IALR0, *IOP3XX_IATVR0); | ||
342 | DBG("PCI: Inbound memory window 1: PCI 0x%08x%08x 0x%08x\n", | ||
343 | *IOP3XX_IAUBAR1, *IOP3XX_IABAR1, *IOP3XX_IALR1); | ||
344 | DBG("PCI: Inbound memory window 2: PCI 0x%08x%08x 0x%08x -> 0x%08x\n", | ||
345 | *IOP3XX_IAUBAR2, *IOP3XX_IABAR2, *IOP3XX_IALR2, *IOP3XX_IATVR2); | ||
346 | DBG("PCI: Inbound memory window 3: PCI 0x%08x%08x 0x%08x -> 0x%08x\n", | ||
347 | *IOP3XX_IAUBAR3, *IOP3XX_IABAR3, *IOP3XX_IALR3, *IOP3XX_IATVR3); | ||
348 | |||
349 | DBG("PCI: Expansion ROM window: PCI 0x%08x%08x 0x%08x -> 0x%08x\n", | ||
350 | 0, *IOP3XX_ERBAR, *IOP3XX_ERLR, *IOP3XX_ERTVR); | ||
351 | |||
333 | DBG("ATU: IOP3XX_ATUCMD=0x%04x\n", *IOP3XX_ATUCMD); | 352 | DBG("ATU: IOP3XX_ATUCMD=0x%04x\n", *IOP3XX_ATUCMD); |
334 | DBG("ATU: IOP3XX_OMWTVR0=0x%04x, IOP3XX_OIOWTVR=0x%04x\n", | ||
335 | *IOP3XX_OMWTVR0, | ||
336 | *IOP3XX_OIOWTVR); | ||
337 | DBG("ATU: IOP3XX_ATUCR=0x%08x\n", *IOP3XX_ATUCR); | 353 | DBG("ATU: IOP3XX_ATUCR=0x%08x\n", *IOP3XX_ATUCR); |
338 | DBG("ATU: IOP3XX_IABAR0=0x%08x IOP3XX_IALR0=0x%08x IOP3XX_IATVR0=%08x\n", | ||
339 | *IOP3XX_IABAR0, *IOP3XX_IALR0, *IOP3XX_IATVR0); | ||
340 | DBG("ATU: IOP3XX_OMWTVR0=0x%08x\n", *IOP3XX_OMWTVR0); | ||
341 | DBG("ATU: IOP3XX_IABAR1=0x%08x IOP3XX_IALR1=0x%08x\n", | ||
342 | *IOP3XX_IABAR1, *IOP3XX_IALR1); | ||
343 | DBG("ATU: IOP3XX_ERBAR=0x%08x IOP3XX_ERLR=0x%08x IOP3XX_ERTVR=%08x\n", | ||
344 | *IOP3XX_ERBAR, *IOP3XX_ERLR, *IOP3XX_ERTVR); | ||
345 | DBG("ATU: IOP3XX_IABAR2=0x%08x IOP3XX_IALR2=0x%08x IOP3XX_IATVR2=%08x\n", | ||
346 | *IOP3XX_IABAR2, *IOP3XX_IALR2, *IOP3XX_IATVR2); | ||
347 | DBG("ATU: IOP3XX_IABAR3=0x%08x IOP3XX_IALR3=0x%08x IOP3XX_IATVR3=%08x\n", | ||
348 | *IOP3XX_IABAR3, *IOP3XX_IALR3, *IOP3XX_IATVR3); | ||
349 | 354 | ||
350 | hook_fault_code(16+6, iop3xx_pci_abort, SIGBUS, "imprecise external abort"); | 355 | hook_fault_code(16+6, iop3xx_pci_abort, SIGBUS, "imprecise external abort"); |
351 | } | 356 | } |