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-rw-r--r--arch/arm/plat-iop/time.c4
1 files changed, 0 insertions, 4 deletions
diff --git a/arch/arm/plat-iop/time.c b/arch/arm/plat-iop/time.c
index f530abdaa7a1..0d53b813cbb4 100644
--- a/arch/arm/plat-iop/time.c
+++ b/arch/arm/plat-iop/time.c
@@ -51,9 +51,7 @@ iop3xx_timer_interrupt(int irq, void *dev_id)
51{ 51{
52 write_seqlock(&xtime_lock); 52 write_seqlock(&xtime_lock);
53 53
54 iop3xx_cp6_enable();
55 asm volatile("mcr p6, 0, %0, c6, c1, 0" : : "r" (1)); 54 asm volatile("mcr p6, 0, %0, c6, c1, 0" : : "r" (1));
56 iop3xx_cp6_disable();
57 55
58 while ((signed long)(next_jiffy_time - *IOP3XX_TU_TCR1) 56 while ((signed long)(next_jiffy_time - *IOP3XX_TU_TCR1)
59 >= ticks_per_jiffy) { 57 >= ticks_per_jiffy) {
@@ -87,12 +85,10 @@ void __init iop3xx_init_time(unsigned long tick_rate)
87 * We use timer 0 for our timer interrupt, and timer 1 as 85 * We use timer 0 for our timer interrupt, and timer 1 as
88 * monotonic counter for tracking missed jiffies. 86 * monotonic counter for tracking missed jiffies.
89 */ 87 */
90 iop3xx_cp6_enable();
91 asm volatile("mcr p6, 0, %0, c4, c1, 0" : : "r" (ticks_per_jiffy - 1)); 88 asm volatile("mcr p6, 0, %0, c4, c1, 0" : : "r" (ticks_per_jiffy - 1));
92 asm volatile("mcr p6, 0, %0, c0, c1, 0" : : "r" (timer_ctl)); 89 asm volatile("mcr p6, 0, %0, c0, c1, 0" : : "r" (timer_ctl));
93 asm volatile("mcr p6, 0, %0, c5, c1, 0" : : "r" (0xffffffff)); 90 asm volatile("mcr p6, 0, %0, c5, c1, 0" : : "r" (0xffffffff));
94 asm volatile("mcr p6, 0, %0, c1, c1, 0" : : "r" (timer_ctl)); 91 asm volatile("mcr p6, 0, %0, c1, c1, 0" : : "r" (timer_ctl));
95 iop3xx_cp6_disable();
96 92
97 setup_irq(IRQ_IOP3XX_TIMER0, &iop3xx_timer_irq); 93 setup_irq(IRQ_IOP3XX_TIMER0, &iop3xx_timer_irq);
98} 94}