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-rw-r--r--arch/arm/plat-iop/time.c8
1 files changed, 4 insertions, 4 deletions
diff --git a/arch/arm/plat-iop/time.c b/arch/arm/plat-iop/time.c
index 16300adfb4de..0cc26da034a1 100644
--- a/arch/arm/plat-iop/time.c
+++ b/arch/arm/plat-iop/time.c
@@ -32,22 +32,22 @@ static unsigned long next_jiffy_time;
32 32
33unsigned long iop_gettimeoffset(void) 33unsigned long iop_gettimeoffset(void)
34{ 34{
35 unsigned long offset, temp1, temp2; 35 unsigned long offset, temp;
36 36
37 /* enable cp6, if necessary, to avoid taking the overhead of an 37 /* enable cp6, if necessary, to avoid taking the overhead of an
38 * undefined instruction trap 38 * undefined instruction trap
39 */ 39 */
40 asm volatile ( 40 asm volatile (
41 "mrc p15, 0, %0, c15, c1, 0\n\t" 41 "mrc p15, 0, %0, c15, c1, 0\n\t"
42 "ands %1, %0, #(1 << 6)\n\t" 42 "tst %0, #(1 << 6)\n\t"
43 "orreq %0, %0, #(1 << 6)\n\t" 43 "orreq %0, %0, #(1 << 6)\n\t"
44 "mcreq p15, 0, %0, c15, c1, 0\n\t" 44 "mcreq p15, 0, %0, c15, c1, 0\n\t"
45#ifdef CONFIG_XSCALE 45#ifdef CONFIG_CPU_XSCALE
46 "mrceq p15, 0, %0, c15, c1, 0\n\t" 46 "mrceq p15, 0, %0, c15, c1, 0\n\t"
47 "moveq %0, %0\n\t" 47 "moveq %0, %0\n\t"
48 "subeq pc, pc, #4\n\t" 48 "subeq pc, pc, #4\n\t"
49#endif 49#endif
50 : "=r"(temp1), "=r"(temp2) : : "cc"); 50 : "=r"(temp) : : "cc");
51 51
52 offset = next_jiffy_time - read_tcr1(); 52 offset = next_jiffy_time - read_tcr1();
53 53