diff options
Diffstat (limited to 'arch/arm/oprofile')
-rw-r--r-- | arch/arm/oprofile/op_model_mpcore.c | 44 |
1 files changed, 22 insertions, 22 deletions
diff --git a/arch/arm/oprofile/op_model_mpcore.c b/arch/arm/oprofile/op_model_mpcore.c index 75bae067922d..74fae6045650 100644 --- a/arch/arm/oprofile/op_model_mpcore.c +++ b/arch/arm/oprofile/op_model_mpcore.c | |||
@@ -51,7 +51,7 @@ | |||
51 | /* | 51 | /* |
52 | * MPCore SCU event monitor support | 52 | * MPCore SCU event monitor support |
53 | */ | 53 | */ |
54 | #define SCU_EVENTMONITORS_VA_BASE __io_address(REALVIEW_MPCORE_SCU_BASE + 0x10) | 54 | #define SCU_EVENTMONITORS_VA_BASE __io_address(REALVIEW_EB11MP_SCU_BASE + 0x10) |
55 | 55 | ||
56 | /* | 56 | /* |
57 | * Bitmask of used SCU counters | 57 | * Bitmask of used SCU counters |
@@ -80,7 +80,7 @@ static irqreturn_t scu_em_interrupt(int irq, void *arg) | |||
80 | struct eventmonitor __iomem *emc = SCU_EVENTMONITORS_VA_BASE; | 80 | struct eventmonitor __iomem *emc = SCU_EVENTMONITORS_VA_BASE; |
81 | unsigned int cnt; | 81 | unsigned int cnt; |
82 | 82 | ||
83 | cnt = irq - IRQ_PMU_SCU0; | 83 | cnt = irq - IRQ_EB11MP_PMU_SCU0; |
84 | oprofile_add_sample(get_irq_regs(), SCU_COUNTER(cnt)); | 84 | oprofile_add_sample(get_irq_regs(), SCU_COUNTER(cnt)); |
85 | scu_reset_counter(emc, cnt); | 85 | scu_reset_counter(emc, cnt); |
86 | 86 | ||
@@ -119,10 +119,10 @@ static int scu_start(void) | |||
119 | */ | 119 | */ |
120 | for (i = 0; i < NUM_SCU_COUNTERS; i++) { | 120 | for (i = 0; i < NUM_SCU_COUNTERS; i++) { |
121 | if (scu_em_used & (1 << i)) { | 121 | if (scu_em_used & (1 << i)) { |
122 | ret = request_irq(IRQ_PMU_SCU0 + i, scu_em_interrupt, IRQF_DISABLED, "SCU PMU", NULL); | 122 | ret = request_irq(IRQ_EB11MP_PMU_SCU0 + i, scu_em_interrupt, IRQF_DISABLED, "SCU PMU", NULL); |
123 | if (ret) { | 123 | if (ret) { |
124 | printk(KERN_ERR "oprofile: unable to request IRQ%u for SCU Event Monitor\n", | 124 | printk(KERN_ERR "oprofile: unable to request IRQ%u for SCU Event Monitor\n", |
125 | IRQ_PMU_SCU0 + i); | 125 | IRQ_EB11MP_PMU_SCU0 + i); |
126 | goto err_free_scu; | 126 | goto err_free_scu; |
127 | } | 127 | } |
128 | } | 128 | } |
@@ -153,7 +153,7 @@ static int scu_start(void) | |||
153 | 153 | ||
154 | err_free_scu: | 154 | err_free_scu: |
155 | while (i--) | 155 | while (i--) |
156 | free_irq(IRQ_PMU_SCU0 + i, NULL); | 156 | free_irq(IRQ_EB11MP_PMU_SCU0 + i, NULL); |
157 | return ret; | 157 | return ret; |
158 | } | 158 | } |
159 | 159 | ||
@@ -175,7 +175,7 @@ static void scu_stop(void) | |||
175 | for (i = 0; i < NUM_SCU_COUNTERS; i++) { | 175 | for (i = 0; i < NUM_SCU_COUNTERS; i++) { |
176 | if (scu_em_used & (1 << i)) { | 176 | if (scu_em_used & (1 << i)) { |
177 | scu_reset_counter(emc, i); | 177 | scu_reset_counter(emc, i); |
178 | free_irq(IRQ_PMU_SCU0 + i, NULL); | 178 | free_irq(IRQ_EB11MP_PMU_SCU0 + i, NULL); |
179 | } | 179 | } |
180 | } | 180 | } |
181 | } | 181 | } |
@@ -225,10 +225,10 @@ static int em_setup_ctrs(void) | |||
225 | } | 225 | } |
226 | 226 | ||
227 | static int arm11_irqs[] = { | 227 | static int arm11_irqs[] = { |
228 | [0] = IRQ_PMU_CPU0, | 228 | [0] = IRQ_EB11MP_PMU_CPU0, |
229 | [1] = IRQ_PMU_CPU1, | 229 | [1] = IRQ_EB11MP_PMU_CPU1, |
230 | [2] = IRQ_PMU_CPU2, | 230 | [2] = IRQ_EB11MP_PMU_CPU2, |
231 | [3] = IRQ_PMU_CPU3 | 231 | [3] = IRQ_EB11MP_PMU_CPU3 |
232 | }; | 232 | }; |
233 | 233 | ||
234 | static int em_start(void) | 234 | static int em_start(void) |
@@ -273,22 +273,22 @@ static int em_setup(void) | |||
273 | /* | 273 | /* |
274 | * Send SCU PMU interrupts to the "owner" CPU. | 274 | * Send SCU PMU interrupts to the "owner" CPU. |
275 | */ | 275 | */ |
276 | em_route_irq(IRQ_PMU_SCU0, 0); | 276 | em_route_irq(IRQ_EB11MP_PMU_SCU0, 0); |
277 | em_route_irq(IRQ_PMU_SCU1, 0); | 277 | em_route_irq(IRQ_EB11MP_PMU_SCU1, 0); |
278 | em_route_irq(IRQ_PMU_SCU2, 1); | 278 | em_route_irq(IRQ_EB11MP_PMU_SCU2, 1); |
279 | em_route_irq(IRQ_PMU_SCU3, 1); | 279 | em_route_irq(IRQ_EB11MP_PMU_SCU3, 1); |
280 | em_route_irq(IRQ_PMU_SCU4, 2); | 280 | em_route_irq(IRQ_EB11MP_PMU_SCU4, 2); |
281 | em_route_irq(IRQ_PMU_SCU5, 2); | 281 | em_route_irq(IRQ_EB11MP_PMU_SCU5, 2); |
282 | em_route_irq(IRQ_PMU_SCU6, 3); | 282 | em_route_irq(IRQ_EB11MP_PMU_SCU6, 3); |
283 | em_route_irq(IRQ_PMU_SCU7, 3); | 283 | em_route_irq(IRQ_EB11MP_PMU_SCU7, 3); |
284 | 284 | ||
285 | /* | 285 | /* |
286 | * Send CP15 PMU interrupts to the owner CPU. | 286 | * Send CP15 PMU interrupts to the owner CPU. |
287 | */ | 287 | */ |
288 | em_route_irq(IRQ_PMU_CPU0, 0); | 288 | em_route_irq(IRQ_EB11MP_PMU_CPU0, 0); |
289 | em_route_irq(IRQ_PMU_CPU1, 1); | 289 | em_route_irq(IRQ_EB11MP_PMU_CPU1, 1); |
290 | em_route_irq(IRQ_PMU_CPU2, 2); | 290 | em_route_irq(IRQ_EB11MP_PMU_CPU2, 2); |
291 | em_route_irq(IRQ_PMU_CPU3, 3); | 291 | em_route_irq(IRQ_EB11MP_PMU_CPU3, 3); |
292 | 292 | ||
293 | return 0; | 293 | return 0; |
294 | } | 294 | } |