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-rw-r--r--arch/arm/nwfpe/entry.S8
1 files changed, 5 insertions, 3 deletions
diff --git a/arch/arm/nwfpe/entry.S b/arch/arm/nwfpe/entry.S
index cafa18354339..d18dde95b8aa 100644
--- a/arch/arm/nwfpe/entry.S
+++ b/arch/arm/nwfpe/entry.S
@@ -20,6 +20,8 @@
20 Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. 20 Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
21*/ 21*/
22 22
23#include <asm/opcodes.h>
24
23/* This is the kernel's entry point into the floating point emulator. 25/* This is the kernel's entry point into the floating point emulator.
24It is called from the kernel with code similar to this: 26It is called from the kernel with code similar to this:
25 27
@@ -81,11 +83,11 @@ nwfpe_enter:
81 mov r6, r0 @ save the opcode 83 mov r6, r0 @ save the opcode
82emulate: 84emulate:
83 ldr r1, [sp, #S_PSR] @ fetch the PSR 85 ldr r1, [sp, #S_PSR] @ fetch the PSR
84 bl checkCondition @ check the condition 86 bl arm_check_condition @ check the condition
85 cmp r0, #0 @ r0 = 0 ==> condition failed 87 cmp r0, #ARM_OPCODE_CONDTEST_PASS @ condition passed?
86 88
87 @ if condition code failed to match, next insn 89 @ if condition code failed to match, next insn
88 beq next @ get the next instruction; 90 bne next @ get the next instruction;
89 91
90 mov r0, r6 @ prepare for EmulateAll() 92 mov r0, r6 @ prepare for EmulateAll()
91 bl EmulateAll @ emulate the instruction 93 bl EmulateAll @ emulate the instruction