aboutsummaryrefslogtreecommitdiffstats
path: root/arch/arm/mm
diff options
context:
space:
mode:
Diffstat (limited to 'arch/arm/mm')
-rw-r--r--arch/arm/mm/Kconfig3
-rw-r--r--arch/arm/mm/cache-v7.S2
2 files changed, 3 insertions, 2 deletions
diff --git a/arch/arm/mm/Kconfig b/arch/arm/mm/Kconfig
index 1a3ca2488164..7edef9121632 100644
--- a/arch/arm/mm/Kconfig
+++ b/arch/arm/mm/Kconfig
@@ -631,7 +631,8 @@ comment "Processor Features"
631 631
632config ARM_LPAE 632config ARM_LPAE
633 bool "Support for the Large Physical Address Extension" 633 bool "Support for the Large Physical Address Extension"
634 depends on MMU && CPU_V7 634 depends on MMU && CPU_32v7 && !CPU_32v6 && !CPU_32v5 && \
635 !CPU_32v4 && !CPU_32v3
635 help 636 help
636 Say Y if you have an ARMv7 processor supporting the LPAE page 637 Say Y if you have an ARMv7 processor supporting the LPAE page
637 table format and you would like to access memory beyond the 638 table format and you would like to access memory beyond the
diff --git a/arch/arm/mm/cache-v7.S b/arch/arm/mm/cache-v7.S
index 7a24d39661f0..a655d3da386d 100644
--- a/arch/arm/mm/cache-v7.S
+++ b/arch/arm/mm/cache-v7.S
@@ -55,7 +55,7 @@ loop1:
55 cmp r1, #2 @ see what cache we have at this level 55 cmp r1, #2 @ see what cache we have at this level
56 blt skip @ skip if no cache, or just i-cache 56 blt skip @ skip if no cache, or just i-cache
57#ifdef CONFIG_PREEMPT 57#ifdef CONFIG_PREEMPT
58 save_and_disable_irqs r9 @ make cssr&csidr read atomic 58 save_and_disable_irqs_notrace r9 @ make cssr&csidr read atomic
59#endif 59#endif
60 mcr p15, 2, r10, c0, c0, 0 @ select current cache level in cssr 60 mcr p15, 2, r10, c0, c0, 0 @ select current cache level in cssr
61 isb @ isb to sych the new cssr&csidr 61 isb @ isb to sych the new cssr&csidr