diff options
Diffstat (limited to 'arch/arm/mm')
-rw-r--r-- | arch/arm/mm/cache-l2x0.c | 6 | ||||
-rw-r--r-- | arch/arm/mm/proc-v7.S | 6 |
2 files changed, 12 insertions, 0 deletions
diff --git a/arch/arm/mm/cache-l2x0.c b/arch/arm/mm/cache-l2x0.c index 170c9bb95866..f2ce38e085d2 100644 --- a/arch/arm/mm/cache-l2x0.c +++ b/arch/arm/mm/cache-l2x0.c | |||
@@ -49,7 +49,13 @@ static inline void cache_wait(void __iomem *reg, unsigned long mask) | |||
49 | static inline void cache_sync(void) | 49 | static inline void cache_sync(void) |
50 | { | 50 | { |
51 | void __iomem *base = l2x0_base; | 51 | void __iomem *base = l2x0_base; |
52 | |||
53 | #ifdef CONFIG_ARM_ERRATA_753970 | ||
54 | /* write to an unmmapped register */ | ||
55 | writel_relaxed(0, base + L2X0_DUMMY_REG); | ||
56 | #else | ||
52 | writel_relaxed(0, base + L2X0_CACHE_SYNC); | 57 | writel_relaxed(0, base + L2X0_CACHE_SYNC); |
58 | #endif | ||
53 | cache_wait(base + L2X0_CACHE_SYNC, 1); | 59 | cache_wait(base + L2X0_CACHE_SYNC, 1); |
54 | } | 60 | } |
55 | 61 | ||
diff --git a/arch/arm/mm/proc-v7.S b/arch/arm/mm/proc-v7.S index 0c1172b56b4e..8e3356239136 100644 --- a/arch/arm/mm/proc-v7.S +++ b/arch/arm/mm/proc-v7.S | |||
@@ -264,6 +264,12 @@ __v7_setup: | |||
264 | orreq r10, r10, #1 << 6 @ set bit #6 | 264 | orreq r10, r10, #1 << 6 @ set bit #6 |
265 | mcreq p15, 0, r10, c15, c0, 1 @ write diagnostic register | 265 | mcreq p15, 0, r10, c15, c0, 1 @ write diagnostic register |
266 | #endif | 266 | #endif |
267 | #ifdef CONFIG_ARM_ERRATA_751472 | ||
268 | cmp r6, #0x30 @ present prior to r3p0 | ||
269 | mrclt p15, 0, r10, c15, c0, 1 @ read diagnostic register | ||
270 | orrlt r10, r10, #1 << 11 @ set bit #11 | ||
271 | mcrlt p15, 0, r10, c15, c0, 1 @ write diagnostic register | ||
272 | #endif | ||
267 | 273 | ||
268 | 3: mov r10, #0 | 274 | 3: mov r10, #0 |
269 | #ifdef HARVARD_CACHE | 275 | #ifdef HARVARD_CACHE |