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-rw-r--r--arch/arm/mm/fault.c2
-rw-r--r--arch/arm/mm/proc-macros.S10
-rw-r--r--arch/arm/mm/proc-v7.S8
3 files changed, 9 insertions, 11 deletions
diff --git a/arch/arm/mm/fault.c b/arch/arm/mm/fault.c
index 1e21e125fe3a..f10f9bac2206 100644
--- a/arch/arm/mm/fault.c
+++ b/arch/arm/mm/fault.c
@@ -108,7 +108,7 @@ void show_pte(struct mm_struct *mm, unsigned long addr)
108 108
109 pte = pte_offset_map(pmd, addr); 109 pte = pte_offset_map(pmd, addr);
110 printk(", *pte=%08lx", pte_val(*pte)); 110 printk(", *pte=%08lx", pte_val(*pte));
111 printk(", *ppte=%08lx", pte_val(pte[-PTRS_PER_PTE])); 111 printk(", *ppte=%08lx", pte_val(pte[PTE_HWTABLE_PTRS]));
112 pte_unmap(pte); 112 pte_unmap(pte);
113 } while(0); 113 } while(0);
114 114
diff --git a/arch/arm/mm/proc-macros.S b/arch/arm/mm/proc-macros.S
index 7d63beaf9745..cbedf9c46b9d 100644
--- a/arch/arm/mm/proc-macros.S
+++ b/arch/arm/mm/proc-macros.S
@@ -121,7 +121,7 @@
121 .endm 121 .endm
122 122
123 .macro armv6_set_pte_ext pfx 123 .macro armv6_set_pte_ext pfx
124 str r1, [r0], #-2048 @ linux version 124 str r1, [r0], #2048 @ linux version
125 125
126 bic r3, r1, #0x000003fc 126 bic r3, r1, #0x000003fc
127 bic r3, r3, #PTE_TYPE_MASK 127 bic r3, r3, #PTE_TYPE_MASK
@@ -170,7 +170,7 @@
170 * 1111 0xff r/w r/w 170 * 1111 0xff r/w r/w
171 */ 171 */
172 .macro armv3_set_pte_ext wc_disable=1 172 .macro armv3_set_pte_ext wc_disable=1
173 str r1, [r0], #-2048 @ linux version 173 str r1, [r0], #2048 @ linux version
174 174
175 eor r3, r1, #L_PTE_PRESENT | L_PTE_YOUNG | L_PTE_WRITE | L_PTE_DIRTY 175 eor r3, r1, #L_PTE_PRESENT | L_PTE_YOUNG | L_PTE_WRITE | L_PTE_DIRTY
176 176
@@ -193,7 +193,7 @@
193 bicne r2, r2, #PTE_BUFFERABLE 193 bicne r2, r2, #PTE_BUFFERABLE
194#endif 194#endif
195 .endif 195 .endif
196 str r2, [r0] @ hardware version 196 str r2, [r0] @ hardware version
197 .endm 197 .endm
198 198
199 199
@@ -213,7 +213,7 @@
213 * 1111 11 r/w r/w 213 * 1111 11 r/w r/w
214 */ 214 */
215 .macro xscale_set_pte_ext_prologue 215 .macro xscale_set_pte_ext_prologue
216 str r1, [r0], #-2048 @ linux version 216 str r1, [r0] @ linux version
217 217
218 eor r3, r1, #L_PTE_PRESENT | L_PTE_YOUNG | L_PTE_WRITE | L_PTE_DIRTY 218 eor r3, r1, #L_PTE_PRESENT | L_PTE_YOUNG | L_PTE_WRITE | L_PTE_DIRTY
219 219
@@ -232,7 +232,7 @@
232 tst r3, #L_PTE_PRESENT | L_PTE_YOUNG @ present and young? 232 tst r3, #L_PTE_PRESENT | L_PTE_YOUNG @ present and young?
233 movne r2, #0 @ no -> fault 233 movne r2, #0 @ no -> fault
234 234
235 str r2, [r0] @ hardware version 235 str r2, [r0, #2048]! @ hardware version
236 mov ip, #0 236 mov ip, #0
237 mcr p15, 0, r0, c7, c10, 1 @ clean L1 D line 237 mcr p15, 0, r0, c7, c10, 1 @ clean L1 D line
238 mcr p15, 0, ip, c7, c10, 4 @ data write barrier 238 mcr p15, 0, ip, c7, c10, 4 @ data write barrier
diff --git a/arch/arm/mm/proc-v7.S b/arch/arm/mm/proc-v7.S
index 53cbe2225153..89c31a6dae5c 100644
--- a/arch/arm/mm/proc-v7.S
+++ b/arch/arm/mm/proc-v7.S
@@ -124,15 +124,13 @@ ENDPROC(cpu_v7_switch_mm)
124 * Set a level 2 translation table entry. 124 * Set a level 2 translation table entry.
125 * 125 *
126 * - ptep - pointer to level 2 translation table entry 126 * - ptep - pointer to level 2 translation table entry
127 * (hardware version is stored at -1024 bytes) 127 * (hardware version is stored at +2048 bytes)
128 * - pte - PTE value to store 128 * - pte - PTE value to store
129 * - ext - value for extended PTE bits 129 * - ext - value for extended PTE bits
130 */ 130 */
131ENTRY(cpu_v7_set_pte_ext) 131ENTRY(cpu_v7_set_pte_ext)
132#ifdef CONFIG_MMU 132#ifdef CONFIG_MMU
133 ARM( str r1, [r0], #-2048 ) @ linux version 133 str r1, [r0] @ linux version
134 THUMB( str r1, [r0] ) @ linux version
135 THUMB( sub r0, r0, #2048 )
136 134
137 bic r3, r1, #0x000003f0 135 bic r3, r1, #0x000003f0
138 bic r3, r3, #PTE_TYPE_MASK 136 bic r3, r3, #PTE_TYPE_MASK
@@ -158,7 +156,7 @@ ENTRY(cpu_v7_set_pte_ext)
158 tstne r1, #L_PTE_PRESENT 156 tstne r1, #L_PTE_PRESENT
159 moveq r3, #0 157 moveq r3, #0
160 158
161 str r3, [r0] 159 str r3, [r0, #2048]!
162 mcr p15, 0, r0, c7, c10, 1 @ flush_pte 160 mcr p15, 0, r0, c7, c10, 1 @ flush_pte
163#endif 161#endif
164 mov pc, lr 162 mov pc, lr