diff options
Diffstat (limited to 'arch/arm/mm/tlb-v6.S')
| -rw-r--r-- | arch/arm/mm/tlb-v6.S | 12 |
1 files changed, 3 insertions, 9 deletions
diff --git a/arch/arm/mm/tlb-v6.S b/arch/arm/mm/tlb-v6.S index 73d7d89b04c4..eca07f550a0b 100644 --- a/arch/arm/mm/tlb-v6.S +++ b/arch/arm/mm/tlb-v6.S | |||
| @@ -54,7 +54,6 @@ ENTRY(v6wbi_flush_user_tlb_range) | |||
| 54 | add r0, r0, #PAGE_SZ | 54 | add r0, r0, #PAGE_SZ |
| 55 | cmp r0, r1 | 55 | cmp r0, r1 |
| 56 | blo 1b | 56 | blo 1b |
| 57 | mcr p15, 0, ip, c7, c5, 6 @ flush BTAC/BTB | ||
| 58 | mcr p15, 0, ip, c7, c10, 4 @ data synchronization barrier | 57 | mcr p15, 0, ip, c7, c10, 4 @ data synchronization barrier |
| 59 | mov pc, lr | 58 | mov pc, lr |
| 60 | 59 | ||
| @@ -83,16 +82,11 @@ ENTRY(v6wbi_flush_kern_tlb_range) | |||
| 83 | add r0, r0, #PAGE_SZ | 82 | add r0, r0, #PAGE_SZ |
| 84 | cmp r0, r1 | 83 | cmp r0, r1 |
| 85 | blo 1b | 84 | blo 1b |
| 86 | mcr p15, 0, r2, c7, c5, 6 @ flush BTAC/BTB | ||
| 87 | mcr p15, 0, r2, c7, c10, 4 @ data synchronization barrier | 85 | mcr p15, 0, r2, c7, c10, 4 @ data synchronization barrier |
| 88 | mcr p15, 0, r2, c7, c5, 4 @ prefetch flush | 86 | mcr p15, 0, r2, c7, c5, 4 @ prefetch flush (isb) |
| 89 | mov pc, lr | 87 | mov pc, lr |
| 90 | 88 | ||
| 91 | __INIT | 89 | __INIT |
| 92 | 90 | ||
| 93 | .type v6wbi_tlb_fns, #object | 91 | /* define struct cpu_tlb_fns (see <asm/tlbflush.h> and proc-macros.S) */ |
| 94 | ENTRY(v6wbi_tlb_fns) | 92 | define_tlb_functions v6wbi, v6wbi_tlb_flags |
| 95 | .long v6wbi_flush_user_tlb_range | ||
| 96 | .long v6wbi_flush_kern_tlb_range | ||
| 97 | .long v6wbi_tlb_flags | ||
| 98 | .size v6wbi_tlb_fns, . - v6wbi_tlb_fns | ||