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-rw-r--r--arch/arm/mm/proc-xscale.S17
1 files changed, 6 insertions, 11 deletions
diff --git a/arch/arm/mm/proc-xscale.S b/arch/arm/mm/proc-xscale.S
index 2749c1f88d7d..490e11b34231 100644
--- a/arch/arm/mm/proc-xscale.S
+++ b/arch/arm/mm/proc-xscale.S
@@ -23,7 +23,7 @@
23#include <linux/linkage.h> 23#include <linux/linkage.h>
24#include <linux/init.h> 24#include <linux/init.h>
25#include <asm/assembler.h> 25#include <asm/assembler.h>
26#include <asm/procinfo.h> 26#include <asm/elf.h>
27#include <asm/pgtable.h> 27#include <asm/pgtable.h>
28#include <asm/pgtable-hwdef.h> 28#include <asm/pgtable-hwdef.h>
29#include <asm/page.h> 29#include <asm/page.h>
@@ -421,14 +421,14 @@ ENTRY(cpu_xscale_switch_mm)
421 cpwait_ret lr, ip 421 cpwait_ret lr, ip
422 422
423/* 423/*
424 * cpu_xscale_set_pte(ptep, pte) 424 * cpu_xscale_set_pte_ext(ptep, pte, ext)
425 * 425 *
426 * Set a PTE and flush it out 426 * Set a PTE and flush it out
427 * 427 *
428 * Errata 40: must set memory to write-through for user read-only pages. 428 * Errata 40: must set memory to write-through for user read-only pages.
429 */ 429 */
430 .align 5 430 .align 5
431ENTRY(cpu_xscale_set_pte) 431ENTRY(cpu_xscale_set_pte_ext)
432 str r1, [r0], #-2048 @ linux version 432 str r1, [r0], #-2048 @ linux version
433 433
434 bic r2, r1, #0xff0 434 bic r2, r1, #0xff0
@@ -491,12 +491,7 @@ __xscale_setup:
491 mcr p15, 0, ip, c7, c7, 0 @ invalidate I, D caches & BTB 491 mcr p15, 0, ip, c7, c7, 0 @ invalidate I, D caches & BTB
492 mcr p15, 0, ip, c7, c10, 4 @ Drain Write (& Fill) Buffer 492 mcr p15, 0, ip, c7, c10, 4 @ Drain Write (& Fill) Buffer
493 mcr p15, 0, ip, c8, c7, 0 @ invalidate I, D TLBs 493 mcr p15, 0, ip, c8, c7, 0 @ invalidate I, D TLBs
494#ifdef CONFIG_IWMMXT 494 mov r0, #1 << 6 @ cp6 for IOP3xx and Bulverde
495 mov r0, #0 @ initially disallow access to CP0/CP1
496#else
497 mov r0, #1 @ Allow access to CP0
498#endif
499 orr r0, r0, #1 << 6 @ cp6 for IOP3xx and Bulverde
500 orr r0, r0, #1 << 13 @ Its undefined whether this 495 orr r0, r0, #1 << 13 @ Its undefined whether this
501 mcr p15, 0, r0, c15, c1, 0 @ affects USR or SVC modes 496 mcr p15, 0, r0, c15, c1, 0 @ affects USR or SVC modes
502 497
@@ -534,7 +529,7 @@ ENTRY(xscale_processor_functions)
534 .word cpu_xscale_do_idle 529 .word cpu_xscale_do_idle
535 .word cpu_xscale_dcache_clean_area 530 .word cpu_xscale_dcache_clean_area
536 .word cpu_xscale_switch_mm 531 .word cpu_xscale_switch_mm
537 .word cpu_xscale_set_pte 532 .word cpu_xscale_set_pte_ext
538 .size xscale_processor_functions, . - xscale_processor_functions 533 .size xscale_processor_functions, . - xscale_processor_functions
539 534
540 .section ".rodata" 535 .section ".rodata"
@@ -909,7 +904,7 @@ __pxa270_proc_info:
909 b __xscale_setup 904 b __xscale_setup
910 .long cpu_arch_name 905 .long cpu_arch_name
911 .long cpu_elf_name 906 .long cpu_elf_name
912 .long HWCAP_SWP|HWCAP_HALF|HWCAP_THUMB|HWCAP_FAST_MULT|HWCAP_EDSP|HWCAP_IWMMXT 907 .long HWCAP_SWP|HWCAP_HALF|HWCAP_THUMB|HWCAP_FAST_MULT|HWCAP_EDSP
913 .long cpu_pxa270_name 908 .long cpu_pxa270_name
914 .long xscale_processor_functions 909 .long xscale_processor_functions
915 .long v4wbi_tlb_fns 910 .long v4wbi_tlb_fns