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-rw-r--r--arch/arm/mm/proc-xscale.S63
1 files changed, 52 insertions, 11 deletions
diff --git a/arch/arm/mm/proc-xscale.S b/arch/arm/mm/proc-xscale.S
index 29bcc4dd6517..521538671f4c 100644
--- a/arch/arm/mm/proc-xscale.S
+++ b/arch/arm/mm/proc-xscale.S
@@ -138,17 +138,23 @@ ENTRY(cpu_xscale_proc_fin)
138 * to what would be the reset vector. 138 * to what would be the reset vector.
139 * 139 *
140 * loc: location to jump to for soft reset 140 * loc: location to jump to for soft reset
141 *
142 * Beware PXA270 erratum E7.
141 */ 143 */
142 .align 5 144 .align 5
143ENTRY(cpu_xscale_reset) 145ENTRY(cpu_xscale_reset)
144 mov r1, #PSR_F_BIT|PSR_I_BIT|SVC_MODE 146 mov r1, #PSR_F_BIT|PSR_I_BIT|SVC_MODE
145 msr cpsr_c, r1 @ reset CPSR 147 msr cpsr_c, r1 @ reset CPSR
148 mcr p15, 0, r1, c10, c4, 1 @ unlock I-TLB
149 mcr p15, 0, r1, c8, c5, 0 @ invalidate I-TLB
146 mrc p15, 0, r1, c1, c0, 0 @ ctrl register 150 mrc p15, 0, r1, c1, c0, 0 @ ctrl register
147 bic r1, r1, #0x0086 @ ........B....CA. 151 bic r1, r1, #0x0086 @ ........B....CA.
148 bic r1, r1, #0x3900 @ ..VIZ..S........ 152 bic r1, r1, #0x3900 @ ..VIZ..S........
153 sub pc, pc, #4 @ flush pipeline
154 @ *** cache line aligned ***
149 mcr p15, 0, r1, c1, c0, 0 @ ctrl register 155 mcr p15, 0, r1, c1, c0, 0 @ ctrl register
150 mcr p15, 0, ip, c7, c7, 0 @ invalidate I,D caches & BTB
151 bic r1, r1, #0x0001 @ ...............M 156 bic r1, r1, #0x0001 @ ...............M
157 mcr p15, 0, ip, c7, c7, 0 @ invalidate I,D caches & BTB
152 mcr p15, 0, r1, c1, c0, 0 @ ctrl register 158 mcr p15, 0, r1, c1, c0, 0 @ ctrl register
153 @ CAUTION: MMU turned off from this point. We count on the pipeline 159 @ CAUTION: MMU turned off from this point. We count on the pipeline
154 @ already containing those two last instructions to survive. 160 @ already containing those two last instructions to survive.
@@ -475,11 +481,12 @@ __xscale_setup:
475 orr r0, r0, #1 << 6 @ cp6 for IOP3xx and Bulverde 481 orr r0, r0, #1 << 6 @ cp6 for IOP3xx and Bulverde
476 orr r0, r0, #1 << 13 @ Its undefined whether this 482 orr r0, r0, #1 << 13 @ Its undefined whether this
477 mcr p15, 0, r0, c15, c1, 0 @ affects USR or SVC modes 483 mcr p15, 0, r0, c15, c1, 0 @ affects USR or SVC modes
484
485 adr r5, xscale_crval
486 ldmia r5, {r5, r6}
478 mrc p15, 0, r0, c1, c0, 0 @ get control register 487 mrc p15, 0, r0, c1, c0, 0 @ get control register
479 ldr r5, xscale_cr1_clear
480 bic r0, r0, r5 488 bic r0, r0, r5
481 ldr r5, xscale_cr1_set 489 orr r0, r0, r6
482 orr r0, r0, r5
483 mov pc, lr 490 mov pc, lr
484 .size __xscale_setup, . - __xscale_setup 491 .size __xscale_setup, . - __xscale_setup
485 492
@@ -489,12 +496,9 @@ __xscale_setup:
489 * ..11 1.01 .... .101 496 * ..11 1.01 .... .101
490 * 497 *
491 */ 498 */
492 .type xscale_cr1_clear, #object 499 .type xscale_crval, #object
493 .type xscale_cr1_set, #object 500xscale_crval:
494xscale_cr1_clear: 501 crval clear=0x00003b07, mmuset=0x00003905, ucset=0x00001900
495 .word 0x3b07
496xscale_cr1_set:
497 .word 0x3905
498 502
499 __INITDATA 503 __INITDATA
500 504
@@ -595,6 +599,9 @@ __80200_proc_info:
595 PMD_SECT_CACHEABLE | \ 599 PMD_SECT_CACHEABLE | \
596 PMD_SECT_AP_WRITE | \ 600 PMD_SECT_AP_WRITE | \
597 PMD_SECT_AP_READ 601 PMD_SECT_AP_READ
602 .long PMD_TYPE_SECT | \
603 PMD_SECT_AP_WRITE | \
604 PMD_SECT_AP_READ
598 b __xscale_setup 605 b __xscale_setup
599 .long cpu_arch_name 606 .long cpu_arch_name
600 .long cpu_elf_name 607 .long cpu_elf_name
@@ -615,6 +622,9 @@ __8032x_proc_info:
615 PMD_SECT_CACHEABLE | \ 622 PMD_SECT_CACHEABLE | \
616 PMD_SECT_AP_WRITE | \ 623 PMD_SECT_AP_WRITE | \
617 PMD_SECT_AP_READ 624 PMD_SECT_AP_READ
625 .long PMD_TYPE_SECT | \
626 PMD_SECT_AP_WRITE | \
627 PMD_SECT_AP_READ
618 b __xscale_setup 628 b __xscale_setup
619 .long cpu_arch_name 629 .long cpu_arch_name
620 .long cpu_elf_name 630 .long cpu_elf_name
@@ -635,6 +645,9 @@ __8033x_proc_info:
635 PMD_SECT_CACHEABLE | \ 645 PMD_SECT_CACHEABLE | \
636 PMD_SECT_AP_WRITE | \ 646 PMD_SECT_AP_WRITE | \
637 PMD_SECT_AP_READ 647 PMD_SECT_AP_READ
648 .long PMD_TYPE_SECT | \
649 PMD_SECT_AP_WRITE | \
650 PMD_SECT_AP_READ
638 b __xscale_setup 651 b __xscale_setup
639 .long cpu_arch_name 652 .long cpu_arch_name
640 .long cpu_elf_name 653 .long cpu_elf_name
@@ -655,6 +668,9 @@ __pxa250_proc_info:
655 PMD_SECT_CACHEABLE | \ 668 PMD_SECT_CACHEABLE | \
656 PMD_SECT_AP_WRITE | \ 669 PMD_SECT_AP_WRITE | \
657 PMD_SECT_AP_READ 670 PMD_SECT_AP_READ
671 .long PMD_TYPE_SECT | \
672 PMD_SECT_AP_WRITE | \
673 PMD_SECT_AP_READ
658 b __xscale_setup 674 b __xscale_setup
659 .long cpu_arch_name 675 .long cpu_arch_name
660 .long cpu_elf_name 676 .long cpu_elf_name
@@ -675,6 +691,9 @@ __pxa210_proc_info:
675 PMD_SECT_CACHEABLE | \ 691 PMD_SECT_CACHEABLE | \
676 PMD_SECT_AP_WRITE | \ 692 PMD_SECT_AP_WRITE | \
677 PMD_SECT_AP_READ 693 PMD_SECT_AP_READ
694 .long PMD_TYPE_SECT | \
695 PMD_SECT_AP_WRITE | \
696 PMD_SECT_AP_READ
678 b __xscale_setup 697 b __xscale_setup
679 .long cpu_arch_name 698 .long cpu_arch_name
680 .long cpu_elf_name 699 .long cpu_elf_name
@@ -695,6 +714,9 @@ __ixp2400_proc_info:
695 PMD_SECT_CACHEABLE | \ 714 PMD_SECT_CACHEABLE | \
696 PMD_SECT_AP_WRITE | \ 715 PMD_SECT_AP_WRITE | \
697 PMD_SECT_AP_READ 716 PMD_SECT_AP_READ
717 .long PMD_TYPE_SECT | \
718 PMD_SECT_AP_WRITE | \
719 PMD_SECT_AP_READ
698 b __xscale_setup 720 b __xscale_setup
699 .long cpu_arch_name 721 .long cpu_arch_name
700 .long cpu_elf_name 722 .long cpu_elf_name
@@ -715,6 +737,9 @@ __ixp2800_proc_info:
715 PMD_SECT_CACHEABLE | \ 737 PMD_SECT_CACHEABLE | \
716 PMD_SECT_AP_WRITE | \ 738 PMD_SECT_AP_WRITE | \
717 PMD_SECT_AP_READ 739 PMD_SECT_AP_READ
740 .long PMD_TYPE_SECT | \
741 PMD_SECT_AP_WRITE | \
742 PMD_SECT_AP_READ
718 b __xscale_setup 743 b __xscale_setup
719 .long cpu_arch_name 744 .long cpu_arch_name
720 .long cpu_elf_name 745 .long cpu_elf_name
@@ -735,6 +760,9 @@ __ixp42x_proc_info:
735 PMD_SECT_CACHEABLE | \ 760 PMD_SECT_CACHEABLE | \
736 PMD_SECT_AP_WRITE | \ 761 PMD_SECT_AP_WRITE | \
737 PMD_SECT_AP_READ 762 PMD_SECT_AP_READ
763 .long PMD_TYPE_SECT | \
764 PMD_SECT_AP_WRITE | \
765 PMD_SECT_AP_READ
738 b __xscale_setup 766 b __xscale_setup
739 .long cpu_arch_name 767 .long cpu_arch_name
740 .long cpu_elf_name 768 .long cpu_elf_name
@@ -750,7 +778,14 @@ __ixp42x_proc_info:
750__ixp46x_proc_info: 778__ixp46x_proc_info:
751 .long 0x69054200 779 .long 0x69054200
752 .long 0xffffff00 780 .long 0xffffff00
753 .long 0x00000c0e 781 .long PMD_TYPE_SECT | \
782 PMD_SECT_BUFFERABLE | \
783 PMD_SECT_CACHEABLE | \
784 PMD_SECT_AP_WRITE | \
785 PMD_SECT_AP_READ
786 .long PMD_TYPE_SECT | \
787 PMD_SECT_AP_WRITE | \
788 PMD_SECT_AP_READ
754 b __xscale_setup 789 b __xscale_setup
755 .long cpu_arch_name 790 .long cpu_arch_name
756 .long cpu_elf_name 791 .long cpu_elf_name
@@ -771,6 +806,9 @@ __pxa255_proc_info:
771 PMD_SECT_CACHEABLE | \ 806 PMD_SECT_CACHEABLE | \
772 PMD_SECT_AP_WRITE | \ 807 PMD_SECT_AP_WRITE | \
773 PMD_SECT_AP_READ 808 PMD_SECT_AP_READ
809 .long PMD_TYPE_SECT | \
810 PMD_SECT_AP_WRITE | \
811 PMD_SECT_AP_READ
774 b __xscale_setup 812 b __xscale_setup
775 .long cpu_arch_name 813 .long cpu_arch_name
776 .long cpu_elf_name 814 .long cpu_elf_name
@@ -791,6 +829,9 @@ __pxa270_proc_info:
791 PMD_SECT_CACHEABLE | \ 829 PMD_SECT_CACHEABLE | \
792 PMD_SECT_AP_WRITE | \ 830 PMD_SECT_AP_WRITE | \
793 PMD_SECT_AP_READ 831 PMD_SECT_AP_READ
832 .long PMD_TYPE_SECT | \
833 PMD_SECT_AP_WRITE | \
834 PMD_SECT_AP_READ
794 b __xscale_setup 835 b __xscale_setup
795 .long cpu_arch_name 836 .long cpu_arch_name
796 .long cpu_elf_name 837 .long cpu_elf_name
generated by cgit v1.2.2 (git 2.25.0) at 2025-11-03 00:18:44 -0500