diff options
Diffstat (limited to 'arch/arm/mm/proc-xsc3.S')
| -rw-r--r-- | arch/arm/mm/proc-xsc3.S | 11 |
1 files changed, 6 insertions, 5 deletions
diff --git a/arch/arm/mm/proc-xsc3.S b/arch/arm/mm/proc-xsc3.S index fab134e29826..96456f548798 100644 --- a/arch/arm/mm/proc-xsc3.S +++ b/arch/arm/mm/proc-xsc3.S | |||
| @@ -226,15 +226,16 @@ ENTRY(xsc3_coherent_user_range) | |||
| 226 | mov pc, lr | 226 | mov pc, lr |
| 227 | 227 | ||
| 228 | /* | 228 | /* |
| 229 | * flush_kern_dcache_page(void *page) | 229 | * flush_kern_dcache_area(void *addr, size_t size) |
| 230 | * | 230 | * |
| 231 | * Ensure no D cache aliasing occurs, either with itself or | 231 | * Ensure no D cache aliasing occurs, either with itself or |
| 232 | * the I cache. | 232 | * the I cache. |
| 233 | * | 233 | * |
| 234 | * - addr - page aligned address | 234 | * - addr - kernel address |
| 235 | * - size - region size | ||
| 235 | */ | 236 | */ |
| 236 | ENTRY(xsc3_flush_kern_dcache_page) | 237 | ENTRY(xsc3_flush_kern_dcache_area) |
| 237 | add r1, r0, #PAGE_SZ | 238 | add r1, r0, r1 |
| 238 | 1: mcr p15, 0, r0, c7, c14, 1 @ clean/invalidate L1 D line | 239 | 1: mcr p15, 0, r0, c7, c14, 1 @ clean/invalidate L1 D line |
| 239 | add r0, r0, #CACHELINESIZE | 240 | add r0, r0, #CACHELINESIZE |
| 240 | cmp r0, r1 | 241 | cmp r0, r1 |
| @@ -309,7 +310,7 @@ ENTRY(xsc3_cache_fns) | |||
| 309 | .long xsc3_flush_user_cache_range | 310 | .long xsc3_flush_user_cache_range |
| 310 | .long xsc3_coherent_kern_range | 311 | .long xsc3_coherent_kern_range |
| 311 | .long xsc3_coherent_user_range | 312 | .long xsc3_coherent_user_range |
| 312 | .long xsc3_flush_kern_dcache_page | 313 | .long xsc3_flush_kern_dcache_area |
| 313 | .long xsc3_dma_inv_range | 314 | .long xsc3_dma_inv_range |
| 314 | .long xsc3_dma_clean_range | 315 | .long xsc3_dma_clean_range |
| 315 | .long xsc3_dma_flush_range | 316 | .long xsc3_dma_flush_range |
