diff options
Diffstat (limited to 'arch/arm/mm/proc-v7.S')
-rw-r--r-- | arch/arm/mm/proc-v7.S | 14 |
1 files changed, 13 insertions, 1 deletions
diff --git a/arch/arm/mm/proc-v7.S b/arch/arm/mm/proc-v7.S index 0b5462a941a6..c63d9bdee51e 100644 --- a/arch/arm/mm/proc-v7.S +++ b/arch/arm/mm/proc-v7.S | |||
@@ -330,7 +330,19 @@ __v7_setup: | |||
330 | 1: | 330 | 1: |
331 | #endif | 331 | #endif |
332 | 332 | ||
333 | 3: mov r10, #0 | 333 | /* Cortex-A15 Errata */ |
334 | 3: ldr r10, =0x00000c0f @ Cortex-A15 primary part number | ||
335 | teq r0, r10 | ||
336 | bne 4f | ||
337 | |||
338 | #ifdef CONFIG_ARM_ERRATA_773022 | ||
339 | cmp r6, #0x4 @ only present up to r0p4 | ||
340 | mrcle p15, 0, r10, c1, c0, 1 @ read aux control register | ||
341 | orrle r10, r10, #1 << 1 @ disable loop buffer | ||
342 | mcrle p15, 0, r10, c1, c0, 1 @ write aux control register | ||
343 | #endif | ||
344 | |||
345 | 4: mov r10, #0 | ||
334 | mcr p15, 0, r10, c7, c5, 0 @ I+BTB cache invalidate | 346 | mcr p15, 0, r10, c7, c5, 0 @ I+BTB cache invalidate |
335 | dsb | 347 | dsb |
336 | #ifdef CONFIG_MMU | 348 | #ifdef CONFIG_MMU |