diff options
Diffstat (limited to 'arch/arm/mm/proc-v7.S')
-rw-r--r-- | arch/arm/mm/proc-v7.S | 14 |
1 files changed, 7 insertions, 7 deletions
diff --git a/arch/arm/mm/proc-v7.S b/arch/arm/mm/proc-v7.S index 3db2c2f04a30..71abb60c4222 100644 --- a/arch/arm/mm/proc-v7.S +++ b/arch/arm/mm/proc-v7.S | |||
@@ -26,7 +26,7 @@ | |||
26 | #endif | 26 | #endif |
27 | 27 | ||
28 | ENTRY(cpu_v7_proc_init) | 28 | ENTRY(cpu_v7_proc_init) |
29 | mov pc, lr | 29 | ret lr |
30 | ENDPROC(cpu_v7_proc_init) | 30 | ENDPROC(cpu_v7_proc_init) |
31 | 31 | ||
32 | ENTRY(cpu_v7_proc_fin) | 32 | ENTRY(cpu_v7_proc_fin) |
@@ -34,7 +34,7 @@ ENTRY(cpu_v7_proc_fin) | |||
34 | bic r0, r0, #0x1000 @ ...i............ | 34 | bic r0, r0, #0x1000 @ ...i............ |
35 | bic r0, r0, #0x0006 @ .............ca. | 35 | bic r0, r0, #0x0006 @ .............ca. |
36 | mcr p15, 0, r0, c1, c0, 0 @ disable caches | 36 | mcr p15, 0, r0, c1, c0, 0 @ disable caches |
37 | mov pc, lr | 37 | ret lr |
38 | ENDPROC(cpu_v7_proc_fin) | 38 | ENDPROC(cpu_v7_proc_fin) |
39 | 39 | ||
40 | /* | 40 | /* |
@@ -71,20 +71,20 @@ ENDPROC(cpu_v7_reset) | |||
71 | ENTRY(cpu_v7_do_idle) | 71 | ENTRY(cpu_v7_do_idle) |
72 | dsb @ WFI may enter a low-power mode | 72 | dsb @ WFI may enter a low-power mode |
73 | wfi | 73 | wfi |
74 | mov pc, lr | 74 | ret lr |
75 | ENDPROC(cpu_v7_do_idle) | 75 | ENDPROC(cpu_v7_do_idle) |
76 | 76 | ||
77 | ENTRY(cpu_v7_dcache_clean_area) | 77 | ENTRY(cpu_v7_dcache_clean_area) |
78 | ALT_SMP(W(nop)) @ MP extensions imply L1 PTW | 78 | ALT_SMP(W(nop)) @ MP extensions imply L1 PTW |
79 | ALT_UP_B(1f) | 79 | ALT_UP_B(1f) |
80 | mov pc, lr | 80 | ret lr |
81 | 1: dcache_line_size r2, r3 | 81 | 1: dcache_line_size r2, r3 |
82 | 2: mcr p15, 0, r0, c7, c10, 1 @ clean D entry | 82 | 2: mcr p15, 0, r0, c7, c10, 1 @ clean D entry |
83 | add r0, r0, r2 | 83 | add r0, r0, r2 |
84 | subs r1, r1, r2 | 84 | subs r1, r1, r2 |
85 | bhi 2b | 85 | bhi 2b |
86 | dsb ishst | 86 | dsb ishst |
87 | mov pc, lr | 87 | ret lr |
88 | ENDPROC(cpu_v7_dcache_clean_area) | 88 | ENDPROC(cpu_v7_dcache_clean_area) |
89 | 89 | ||
90 | string cpu_v7_name, "ARMv7 Processor" | 90 | string cpu_v7_name, "ARMv7 Processor" |
@@ -163,7 +163,7 @@ ENTRY(cpu_pj4b_do_idle) | |||
163 | dsb @ WFI may enter a low-power mode | 163 | dsb @ WFI may enter a low-power mode |
164 | wfi | 164 | wfi |
165 | dsb @barrier | 165 | dsb @barrier |
166 | mov pc, lr | 166 | ret lr |
167 | ENDPROC(cpu_pj4b_do_idle) | 167 | ENDPROC(cpu_pj4b_do_idle) |
168 | #else | 168 | #else |
169 | globl_equ cpu_pj4b_do_idle, cpu_v7_do_idle | 169 | globl_equ cpu_pj4b_do_idle, cpu_v7_do_idle |
@@ -407,7 +407,7 @@ __v7_setup: | |||
407 | bic r0, r0, r5 @ clear bits them | 407 | bic r0, r0, r5 @ clear bits them |
408 | orr r0, r0, r6 @ set them | 408 | orr r0, r0, r6 @ set them |
409 | THUMB( orr r0, r0, #1 << 30 ) @ Thumb exceptions | 409 | THUMB( orr r0, r0, #1 << 30 ) @ Thumb exceptions |
410 | mov pc, lr @ return to head.S:__ret | 410 | ret lr @ return to head.S:__ret |
411 | ENDPROC(__v7_setup) | 411 | ENDPROC(__v7_setup) |
412 | 412 | ||
413 | .align 2 | 413 | .align 2 |