diff options
Diffstat (limited to 'arch/arm/mm/proc-v7.S')
| -rw-r--r-- | arch/arm/mm/proc-v7.S | 5 |
1 files changed, 5 insertions, 0 deletions
diff --git a/arch/arm/mm/proc-v7.S b/arch/arm/mm/proc-v7.S index 370baa7a0f08..f2305441e7d1 100644 --- a/arch/arm/mm/proc-v7.S +++ b/arch/arm/mm/proc-v7.S | |||
| @@ -194,6 +194,11 @@ __v7_setup: | |||
| 194 | orr r10, r10, #(1 << 9) @ set PLDNOP to 1 | 194 | orr r10, r10, #(1 << 9) @ set PLDNOP to 1 |
| 195 | mcr p15, 0, r10, c1, c0, 1 @ write aux control register | 195 | mcr p15, 0, r10, c1, c0, 1 @ write aux control register |
| 196 | #endif | 196 | #endif |
| 197 | #ifdef CONFIG_ARM_ERRATA_460075 | ||
| 198 | mrc p15, 1, r10, c9, c0, 2 @ read L2 cache aux ctrl register | ||
| 199 | orr r10, r10, #(1 << 22) @ set the Write Allocate disable bit | ||
| 200 | mcr p15, 1, r10, c9, c0, 2 @ write the L2 cache aux ctrl register | ||
| 201 | #endif | ||
| 197 | mov r10, #0 | 202 | mov r10, #0 |
| 198 | #ifdef HARVARD_CACHE | 203 | #ifdef HARVARD_CACHE |
| 199 | mcr p15, 0, r10, c7, c5, 0 @ I+BTB cache invalidate | 204 | mcr p15, 0, r10, c7, c5, 0 @ I+BTB cache invalidate |