diff options
Diffstat (limited to 'arch/arm/mm/proc-v7.S')
-rw-r--r-- | arch/arm/mm/proc-v7.S | 14 |
1 files changed, 7 insertions, 7 deletions
diff --git a/arch/arm/mm/proc-v7.S b/arch/arm/mm/proc-v7.S index babfba09c89f..b3b566ec83d3 100644 --- a/arch/arm/mm/proc-v7.S +++ b/arch/arm/mm/proc-v7.S | |||
@@ -108,18 +108,16 @@ ENTRY(cpu_v7_switch_mm) | |||
108 | #ifdef CONFIG_ARM_ERRATA_430973 | 108 | #ifdef CONFIG_ARM_ERRATA_430973 |
109 | mcr p15, 0, r2, c7, c5, 6 @ flush BTAC/BTB | 109 | mcr p15, 0, r2, c7, c5, 6 @ flush BTAC/BTB |
110 | #endif | 110 | #endif |
111 | #ifdef CONFIG_ARM_ERRATA_754322 | 111 | mrc p15, 0, r2, c2, c0, 1 @ load TTB 1 |
112 | dsb | 112 | mcr p15, 0, r2, c2, c0, 0 @ into TTB 0 |
113 | #endif | ||
114 | mcr p15, 0, r2, c13, c0, 1 @ set reserved context ID | ||
115 | isb | ||
116 | 1: mcr p15, 0, r0, c2, c0, 0 @ set TTB 0 | ||
117 | isb | 113 | isb |
118 | #ifdef CONFIG_ARM_ERRATA_754322 | 114 | #ifdef CONFIG_ARM_ERRATA_754322 |
119 | dsb | 115 | dsb |
120 | #endif | 116 | #endif |
121 | mcr p15, 0, r1, c13, c0, 1 @ set context ID | 117 | mcr p15, 0, r1, c13, c0, 1 @ set context ID |
122 | isb | 118 | isb |
119 | mcr p15, 0, r0, c2, c0, 0 @ set TTB 0 | ||
120 | isb | ||
123 | #endif | 121 | #endif |
124 | mov pc, lr | 122 | mov pc, lr |
125 | ENDPROC(cpu_v7_switch_mm) | 123 | ENDPROC(cpu_v7_switch_mm) |
@@ -368,7 +366,9 @@ __v7_setup: | |||
368 | mcr p15, 0, r10, c2, c0, 2 @ TTB control register | 366 | mcr p15, 0, r10, c2, c0, 2 @ TTB control register |
369 | ALT_SMP(orr r4, r4, #TTB_FLAGS_SMP) | 367 | ALT_SMP(orr r4, r4, #TTB_FLAGS_SMP) |
370 | ALT_UP(orr r4, r4, #TTB_FLAGS_UP) | 368 | ALT_UP(orr r4, r4, #TTB_FLAGS_UP) |
371 | mcr p15, 0, r4, c2, c0, 1 @ load TTB1 | 369 | ALT_SMP(orr r8, r8, #TTB_FLAGS_SMP) |
370 | ALT_UP(orr r8, r8, #TTB_FLAGS_UP) | ||
371 | mcr p15, 0, r8, c2, c0, 1 @ load TTB1 | ||
372 | ldr r5, =PRRR @ PRRR | 372 | ldr r5, =PRRR @ PRRR |
373 | ldr r6, =NMRR @ NMRR | 373 | ldr r6, =NMRR @ NMRR |
374 | mcr p15, 0, r5, c10, c2, 0 @ write PRRR | 374 | mcr p15, 0, r5, c10, c2, 0 @ write PRRR |