diff options
Diffstat (limited to 'arch/arm/mm/proc-feroceon.S')
-rw-r--r-- | arch/arm/mm/proc-feroceon.S | 33 |
1 files changed, 10 insertions, 23 deletions
diff --git a/arch/arm/mm/proc-feroceon.S b/arch/arm/mm/proc-feroceon.S index f2e5884c513a..0fe1f8fc3488 100644 --- a/arch/arm/mm/proc-feroceon.S +++ b/arch/arm/mm/proc-feroceon.S | |||
@@ -22,7 +22,7 @@ | |||
22 | #include <linux/linkage.h> | 22 | #include <linux/linkage.h> |
23 | #include <linux/init.h> | 23 | #include <linux/init.h> |
24 | #include <asm/assembler.h> | 24 | #include <asm/assembler.h> |
25 | #include <asm/elf.h> | 25 | #include <asm/hwcap.h> |
26 | #include <asm/pgtable-hwdef.h> | 26 | #include <asm/pgtable-hwdef.h> |
27 | #include <asm/pgtable.h> | 27 | #include <asm/pgtable.h> |
28 | #include <asm/page.h> | 28 | #include <asm/page.h> |
@@ -80,7 +80,8 @@ ENTRY(cpu_feroceon_proc_fin) | |||
80 | msr cpsr_c, ip | 80 | msr cpsr_c, ip |
81 | bl feroceon_flush_kern_cache_all | 81 | bl feroceon_flush_kern_cache_all |
82 | 82 | ||
83 | #if defined(CONFIG_CACHE_FEROCEON_L2) && !defined(CONFIG_L2_CACHE_WRITETHROUGH) | 83 | #if defined(CONFIG_CACHE_FEROCEON_L2) && \ |
84 | !defined(CONFIG_CACHE_FEROCEON_L2_WRITETHROUGH) | ||
84 | mov r0, #0 | 85 | mov r0, #0 |
85 | mcr p15, 1, r0, c15, c9, 0 @ clean L2 | 86 | mcr p15, 1, r0, c15, c9, 0 @ clean L2 |
86 | mcr p15, 0, r0, c7, c10, 4 @ drain WB | 87 | mcr p15, 0, r0, c7, c10, 4 @ drain WB |
@@ -389,7 +390,8 @@ ENTRY(feroceon_range_cache_fns) | |||
389 | 390 | ||
390 | .align 5 | 391 | .align 5 |
391 | ENTRY(cpu_feroceon_dcache_clean_area) | 392 | ENTRY(cpu_feroceon_dcache_clean_area) |
392 | #if defined(CONFIG_CACHE_FEROCEON_L2) && !defined(CONFIG_L2_CACHE_WRITETHROUGH) | 393 | #if defined(CONFIG_CACHE_FEROCEON_L2) && \ |
394 | !defined(CONFIG_CACHE_FEROCEON_L2_WRITETHROUGH) | ||
393 | mov r2, r0 | 395 | mov r2, r0 |
394 | mov r3, r1 | 396 | mov r3, r1 |
395 | #endif | 397 | #endif |
@@ -397,7 +399,8 @@ ENTRY(cpu_feroceon_dcache_clean_area) | |||
397 | add r0, r0, #CACHE_DLINESIZE | 399 | add r0, r0, #CACHE_DLINESIZE |
398 | subs r1, r1, #CACHE_DLINESIZE | 400 | subs r1, r1, #CACHE_DLINESIZE |
399 | bhi 1b | 401 | bhi 1b |
400 | #if defined(CONFIG_CACHE_FEROCEON_L2) && !defined(CONFIG_L2_CACHE_WRITETHROUGH) | 402 | #if defined(CONFIG_CACHE_FEROCEON_L2) && \ |
403 | !defined(CONFIG_CACHE_FEROCEON_L2_WRITETHROUGH) | ||
401 | 1: mcr p15, 1, r2, c15, c9, 1 @ clean L2 entry | 404 | 1: mcr p15, 1, r2, c15, c9, 1 @ clean L2 entry |
402 | add r2, r2, #CACHE_DLINESIZE | 405 | add r2, r2, #CACHE_DLINESIZE |
403 | subs r3, r3, #CACHE_DLINESIZE | 406 | subs r3, r3, #CACHE_DLINESIZE |
@@ -446,27 +449,11 @@ ENTRY(cpu_feroceon_switch_mm) | |||
446 | .align 5 | 449 | .align 5 |
447 | ENTRY(cpu_feroceon_set_pte_ext) | 450 | ENTRY(cpu_feroceon_set_pte_ext) |
448 | #ifdef CONFIG_MMU | 451 | #ifdef CONFIG_MMU |
449 | str r1, [r0], #-2048 @ linux version | 452 | armv3_set_pte_ext wc_disable=0 |
450 | |||
451 | eor r1, r1, #L_PTE_PRESENT | L_PTE_YOUNG | L_PTE_WRITE | L_PTE_DIRTY | ||
452 | |||
453 | bic r2, r1, #PTE_SMALL_AP_MASK | ||
454 | bic r2, r2, #PTE_TYPE_MASK | ||
455 | orr r2, r2, #PTE_TYPE_SMALL | ||
456 | |||
457 | tst r1, #L_PTE_USER @ User? | ||
458 | orrne r2, r2, #PTE_SMALL_AP_URO_SRW | ||
459 | |||
460 | tst r1, #L_PTE_WRITE | L_PTE_DIRTY @ Write and Dirty? | ||
461 | orreq r2, r2, #PTE_SMALL_AP_UNO_SRW | ||
462 | |||
463 | tst r1, #L_PTE_PRESENT | L_PTE_YOUNG @ Present and Young? | ||
464 | movne r2, #0 | ||
465 | |||
466 | str r2, [r0] @ hardware version | ||
467 | mov r0, r0 | 453 | mov r0, r0 |
468 | mcr p15, 0, r0, c7, c10, 1 @ clean D entry | 454 | mcr p15, 0, r0, c7, c10, 1 @ clean D entry |
469 | #if defined(CONFIG_CACHE_FEROCEON_L2) && !defined(CONFIG_L2_CACHE_WRITETHROUGH) | 455 | #if defined(CONFIG_CACHE_FEROCEON_L2) && \ |
456 | !defined(CONFIG_CACHE_FEROCEON_L2_WRITETHROUGH) | ||
470 | mcr p15, 1, r0, c15, c9, 1 @ clean L2 entry | 457 | mcr p15, 1, r0, c15, c9, 1 @ clean L2 entry |
471 | #endif | 458 | #endif |
472 | mcr p15, 0, r0, c7, c10, 4 @ drain WB | 459 | mcr p15, 0, r0, c7, c10, 4 @ drain WB |