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-rw-r--r--arch/arm/mm/proc-arm922.S11
1 files changed, 6 insertions, 5 deletions
diff --git a/arch/arm/mm/proc-arm922.S b/arch/arm/mm/proc-arm922.S
index 06a1aa4e3398..ee111b00fa41 100644
--- a/arch/arm/mm/proc-arm922.S
+++ b/arch/arm/mm/proc-arm922.S
@@ -209,15 +209,16 @@ ENTRY(arm922_coherent_user_range)
209 mov pc, lr 209 mov pc, lr
210 210
211/* 211/*
212 * flush_kern_dcache_page(void *page) 212 * flush_kern_dcache_area(void *addr, size_t size)
213 * 213 *
214 * Ensure no D cache aliasing occurs, either with itself or 214 * Ensure no D cache aliasing occurs, either with itself or
215 * the I cache 215 * the I cache
216 * 216 *
217 * - addr - page aligned address 217 * - addr - kernel address
218 * - size - region size
218 */ 219 */
219ENTRY(arm922_flush_kern_dcache_page) 220ENTRY(arm922_flush_kern_dcache_area)
220 add r1, r0, #PAGE_SZ 221 add r1, r0, r1
2211: mcr p15, 0, r0, c7, c14, 1 @ clean+invalidate D entry 2221: mcr p15, 0, r0, c7, c14, 1 @ clean+invalidate D entry
222 add r0, r0, #CACHE_DLINESIZE 223 add r0, r0, #CACHE_DLINESIZE
223 cmp r0, r1 224 cmp r0, r1
@@ -295,7 +296,7 @@ ENTRY(arm922_cache_fns)
295 .long arm922_flush_user_cache_range 296 .long arm922_flush_user_cache_range
296 .long arm922_coherent_kern_range 297 .long arm922_coherent_kern_range
297 .long arm922_coherent_user_range 298 .long arm922_coherent_user_range
298 .long arm922_flush_kern_dcache_page 299 .long arm922_flush_kern_dcache_area
299 .long arm922_dma_inv_range 300 .long arm922_dma_inv_range
300 .long arm922_dma_clean_range 301 .long arm922_dma_clean_range
301 .long arm922_dma_flush_range 302 .long arm922_dma_flush_range