diff options
Diffstat (limited to 'arch/arm/mm/proc-arm920.S')
-rw-r--r-- | arch/arm/mm/proc-arm920.S | 9 |
1 files changed, 9 insertions, 0 deletions
diff --git a/arch/arm/mm/proc-arm920.S b/arch/arm/mm/proc-arm920.S index a17f79e0199c..31dc839ba07c 100644 --- a/arch/arm/mm/proc-arm920.S +++ b/arch/arm/mm/proc-arm920.S | |||
@@ -3,6 +3,7 @@ | |||
3 | * | 3 | * |
4 | * Copyright (C) 1999,2000 ARM Limited | 4 | * Copyright (C) 1999,2000 ARM Limited |
5 | * Copyright (C) 2000 Deep Blue Solutions Ltd. | 5 | * Copyright (C) 2000 Deep Blue Solutions Ltd. |
6 | * hacked for non-paged-MM by Hyok S. Choi, 2003. | ||
6 | * | 7 | * |
7 | * This program is free software; you can redistribute it and/or modify | 8 | * This program is free software; you can redistribute it and/or modify |
8 | * it under the terms of the GNU General Public License as published by | 9 | * it under the terms of the GNU General Public License as published by |
@@ -97,7 +98,9 @@ ENTRY(cpu_arm920_reset) | |||
97 | mov ip, #0 | 98 | mov ip, #0 |
98 | mcr p15, 0, ip, c7, c7, 0 @ invalidate I,D caches | 99 | mcr p15, 0, ip, c7, c7, 0 @ invalidate I,D caches |
99 | mcr p15, 0, ip, c7, c10, 4 @ drain WB | 100 | mcr p15, 0, ip, c7, c10, 4 @ drain WB |
101 | #ifdef CONFIG_MMU | ||
100 | mcr p15, 0, ip, c8, c7, 0 @ invalidate I & D TLBs | 102 | mcr p15, 0, ip, c8, c7, 0 @ invalidate I & D TLBs |
103 | #endif | ||
101 | mrc p15, 0, ip, c1, c0, 0 @ ctrl register | 104 | mrc p15, 0, ip, c1, c0, 0 @ ctrl register |
102 | bic ip, ip, #0x000f @ ............wcam | 105 | bic ip, ip, #0x000f @ ............wcam |
103 | bic ip, ip, #0x1100 @ ...i...s........ | 106 | bic ip, ip, #0x1100 @ ...i...s........ |
@@ -317,6 +320,7 @@ ENTRY(cpu_arm920_dcache_clean_area) | |||
317 | */ | 320 | */ |
318 | .align 5 | 321 | .align 5 |
319 | ENTRY(cpu_arm920_switch_mm) | 322 | ENTRY(cpu_arm920_switch_mm) |
323 | #ifdef CONFIG_MMU | ||
320 | mov ip, #0 | 324 | mov ip, #0 |
321 | #ifdef CONFIG_CPU_DCACHE_WRITETHROUGH | 325 | #ifdef CONFIG_CPU_DCACHE_WRITETHROUGH |
322 | mcr p15, 0, ip, c7, c6, 0 @ invalidate D cache | 326 | mcr p15, 0, ip, c7, c6, 0 @ invalidate D cache |
@@ -337,6 +341,7 @@ ENTRY(cpu_arm920_switch_mm) | |||
337 | mcr p15, 0, ip, c7, c10, 4 @ drain WB | 341 | mcr p15, 0, ip, c7, c10, 4 @ drain WB |
338 | mcr p15, 0, r0, c2, c0, 0 @ load page table pointer | 342 | mcr p15, 0, r0, c2, c0, 0 @ load page table pointer |
339 | mcr p15, 0, ip, c8, c7, 0 @ invalidate I & D TLBs | 343 | mcr p15, 0, ip, c8, c7, 0 @ invalidate I & D TLBs |
344 | #endif | ||
340 | mov pc, lr | 345 | mov pc, lr |
341 | 346 | ||
342 | /* | 347 | /* |
@@ -346,6 +351,7 @@ ENTRY(cpu_arm920_switch_mm) | |||
346 | */ | 351 | */ |
347 | .align 5 | 352 | .align 5 |
348 | ENTRY(cpu_arm920_set_pte) | 353 | ENTRY(cpu_arm920_set_pte) |
354 | #ifdef CONFIG_MMU | ||
349 | str r1, [r0], #-2048 @ linux version | 355 | str r1, [r0], #-2048 @ linux version |
350 | 356 | ||
351 | eor r1, r1, #L_PTE_PRESENT | L_PTE_YOUNG | L_PTE_WRITE | L_PTE_DIRTY | 357 | eor r1, r1, #L_PTE_PRESENT | L_PTE_YOUNG | L_PTE_WRITE | L_PTE_DIRTY |
@@ -372,6 +378,7 @@ ENTRY(cpu_arm920_set_pte) | |||
372 | mov r0, r0 | 378 | mov r0, r0 |
373 | mcr p15, 0, r0, c7, c10, 1 @ clean D entry | 379 | mcr p15, 0, r0, c7, c10, 1 @ clean D entry |
374 | mcr p15, 0, r0, c7, c10, 4 @ drain WB | 380 | mcr p15, 0, r0, c7, c10, 4 @ drain WB |
381 | #endif /* CONFIG_MMU */ | ||
375 | mov pc, lr | 382 | mov pc, lr |
376 | 383 | ||
377 | __INIT | 384 | __INIT |
@@ -381,7 +388,9 @@ __arm920_setup: | |||
381 | mov r0, #0 | 388 | mov r0, #0 |
382 | mcr p15, 0, r0, c7, c7 @ invalidate I,D caches on v4 | 389 | mcr p15, 0, r0, c7, c7 @ invalidate I,D caches on v4 |
383 | mcr p15, 0, r0, c7, c10, 4 @ drain write buffer on v4 | 390 | mcr p15, 0, r0, c7, c10, 4 @ drain write buffer on v4 |
391 | #ifdef CONFIG_MMU | ||
384 | mcr p15, 0, r0, c8, c7 @ invalidate I,D TLBs on v4 | 392 | mcr p15, 0, r0, c8, c7 @ invalidate I,D TLBs on v4 |
393 | #endif | ||
385 | mrc p15, 0, r0, c1, c0 @ get control register v4 | 394 | mrc p15, 0, r0, c1, c0 @ get control register v4 |
386 | ldr r5, arm920_cr1_clear | 395 | ldr r5, arm920_cr1_clear |
387 | bic r0, r0, r5 | 396 | bic r0, r0, r5 |