aboutsummaryrefslogtreecommitdiffstats
path: root/arch/arm/mm/proc-arm920.S
diff options
context:
space:
mode:
Diffstat (limited to 'arch/arm/mm/proc-arm920.S')
-rw-r--r--arch/arm/mm/proc-arm920.S32
1 files changed, 28 insertions, 4 deletions
diff --git a/arch/arm/mm/proc-arm920.S b/arch/arm/mm/proc-arm920.S
index 471669e2d7cb..8be81992645d 100644
--- a/arch/arm/mm/proc-arm920.S
+++ b/arch/arm/mm/proc-arm920.S
@@ -239,7 +239,7 @@ ENTRY(arm920_flush_kern_dcache_area)
239 * 239 *
240 * (same as v4wb) 240 * (same as v4wb)
241 */ 241 */
242ENTRY(arm920_dma_inv_range) 242arm920_dma_inv_range:
243 tst r0, #CACHE_DLINESIZE - 1 243 tst r0, #CACHE_DLINESIZE - 1
244 bic r0, r0, #CACHE_DLINESIZE - 1 244 bic r0, r0, #CACHE_DLINESIZE - 1
245 mcrne p15, 0, r0, c7, c10, 1 @ clean D entry 245 mcrne p15, 0, r0, c7, c10, 1 @ clean D entry
@@ -262,7 +262,7 @@ ENTRY(arm920_dma_inv_range)
262 * 262 *
263 * (same as v4wb) 263 * (same as v4wb)
264 */ 264 */
265ENTRY(arm920_dma_clean_range) 265arm920_dma_clean_range:
266 bic r0, r0, #CACHE_DLINESIZE - 1 266 bic r0, r0, #CACHE_DLINESIZE - 1
2671: mcr p15, 0, r0, c7, c10, 1 @ clean D entry 2671: mcr p15, 0, r0, c7, c10, 1 @ clean D entry
268 add r0, r0, #CACHE_DLINESIZE 268 add r0, r0, #CACHE_DLINESIZE
@@ -288,6 +288,30 @@ ENTRY(arm920_dma_flush_range)
288 mcr p15, 0, r0, c7, c10, 4 @ drain WB 288 mcr p15, 0, r0, c7, c10, 4 @ drain WB
289 mov pc, lr 289 mov pc, lr
290 290
291/*
292 * dma_map_area(start, size, dir)
293 * - start - kernel virtual start address
294 * - size - size of region
295 * - dir - DMA direction
296 */
297ENTRY(arm920_dma_map_area)
298 add r1, r1, r0
299 cmp r2, #DMA_TO_DEVICE
300 beq arm920_dma_clean_range
301 bcs arm920_dma_inv_range
302 b arm920_dma_flush_range
303ENDPROC(arm920_dma_map_area)
304
305/*
306 * dma_unmap_area(start, size, dir)
307 * - start - kernel virtual start address
308 * - size - size of region
309 * - dir - DMA direction
310 */
311ENTRY(arm920_dma_unmap_area)
312 mov pc, lr
313ENDPROC(arm920_dma_unmap_area)
314
291ENTRY(arm920_cache_fns) 315ENTRY(arm920_cache_fns)
292 .long arm920_flush_kern_cache_all 316 .long arm920_flush_kern_cache_all
293 .long arm920_flush_user_cache_all 317 .long arm920_flush_user_cache_all
@@ -295,8 +319,8 @@ ENTRY(arm920_cache_fns)
295 .long arm920_coherent_kern_range 319 .long arm920_coherent_kern_range
296 .long arm920_coherent_user_range 320 .long arm920_coherent_user_range
297 .long arm920_flush_kern_dcache_area 321 .long arm920_flush_kern_dcache_area
298 .long arm920_dma_inv_range 322 .long arm920_dma_map_area
299 .long arm920_dma_clean_range 323 .long arm920_dma_unmap_area
300 .long arm920_dma_flush_range 324 .long arm920_dma_flush_range
301 325
302#endif 326#endif