diff options
Diffstat (limited to 'arch/arm/mm/proc-arm1026.S')
| -rw-r--r-- | arch/arm/mm/proc-arm1026.S | 39 |
1 files changed, 11 insertions, 28 deletions
diff --git a/arch/arm/mm/proc-arm1026.S b/arch/arm/mm/proc-arm1026.S index 33e1ab8eb1d6..6ea76321d0df 100644 --- a/arch/arm/mm/proc-arm1026.S +++ b/arch/arm/mm/proc-arm1026.S | |||
| @@ -398,11 +398,11 @@ __arm1026_setup: | |||
| 398 | mov r0, #4 @ explicitly disable writeback | 398 | mov r0, #4 @ explicitly disable writeback |
| 399 | mcr p15, 7, r0, c15, c0, 0 | 399 | mcr p15, 7, r0, c15, c0, 0 |
| 400 | #endif | 400 | #endif |
| 401 | adr r5, arm1026_crval | ||
| 402 | ldmia r5, {r5, r6} | ||
| 401 | mrc p15, 0, r0, c1, c0 @ get control register v4 | 403 | mrc p15, 0, r0, c1, c0 @ get control register v4 |
| 402 | ldr r5, arm1026_cr1_clear | ||
| 403 | bic r0, r0, r5 | 404 | bic r0, r0, r5 |
| 404 | ldr r5, arm1026_cr1_set | 405 | orr r0, r0, r6 |
| 405 | orr r0, r0, r5 | ||
| 406 | #ifdef CONFIG_CPU_CACHE_ROUND_ROBIN | 406 | #ifdef CONFIG_CPU_CACHE_ROUND_ROBIN |
| 407 | orr r0, r0, #0x4000 @ .R.. .... .... .... | 407 | orr r0, r0, #0x4000 @ .R.. .... .... .... |
| 408 | #endif | 408 | #endif |
| @@ -415,12 +415,9 @@ __arm1026_setup: | |||
| 415 | * .011 1001 ..11 0101 | 415 | * .011 1001 ..11 0101 |
| 416 | * | 416 | * |
| 417 | */ | 417 | */ |
| 418 | .type arm1026_cr1_clear, #object | 418 | .type arm1026_crval, #object |
| 419 | .type arm1026_cr1_set, #object | 419 | arm1026_crval: |
| 420 | arm1026_cr1_clear: | 420 | crval clear=0x00007f3f, mmuset=0x00003935, ucset=0x00001934 |
| 421 | .word 0x7f3f | ||
| 422 | arm1026_cr1_set: | ||
| 423 | .word 0x3935 | ||
| 424 | 421 | ||
| 425 | __INITDATA | 422 | __INITDATA |
| 426 | 423 | ||
| @@ -455,25 +452,7 @@ cpu_elf_name: | |||
| 455 | 452 | ||
| 456 | .type cpu_arm1026_name, #object | 453 | .type cpu_arm1026_name, #object |
| 457 | cpu_arm1026_name: | 454 | cpu_arm1026_name: |
| 458 | .ascii "ARM1026EJ-S" | 455 | .asciz "ARM1026EJ-S" |
| 459 | #ifndef CONFIG_CPU_ICACHE_DISABLE | ||
| 460 | .ascii "i" | ||
| 461 | #endif | ||
| 462 | #ifndef CONFIG_CPU_DCACHE_DISABLE | ||
| 463 | .ascii "d" | ||
| 464 | #ifdef CONFIG_CPU_DCACHE_WRITETHROUGH | ||
| 465 | .ascii "(wt)" | ||
| 466 | #else | ||
| 467 | .ascii "(wb)" | ||
| 468 | #endif | ||
| 469 | #endif | ||
| 470 | #ifndef CONFIG_CPU_BPREDICT_DISABLE | ||
| 471 | .ascii "B" | ||
| 472 | #endif | ||
| 473 | #ifdef CONFIG_CPU_CACHE_ROUND_ROBIN | ||
| 474 | .ascii "RR" | ||
| 475 | #endif | ||
| 476 | .ascii "\0" | ||
| 477 | .size cpu_arm1026_name, . - cpu_arm1026_name | 456 | .size cpu_arm1026_name, . - cpu_arm1026_name |
| 478 | 457 | ||
| 479 | .align | 458 | .align |
| @@ -488,6 +467,10 @@ __arm1026_proc_info: | |||
| 488 | PMD_BIT4 | \ | 467 | PMD_BIT4 | \ |
| 489 | PMD_SECT_AP_WRITE | \ | 468 | PMD_SECT_AP_WRITE | \ |
| 490 | PMD_SECT_AP_READ | 469 | PMD_SECT_AP_READ |
| 470 | .long PMD_TYPE_SECT | \ | ||
| 471 | PMD_BIT4 | \ | ||
| 472 | PMD_SECT_AP_WRITE | \ | ||
| 473 | PMD_SECT_AP_READ | ||
| 491 | b __arm1026_setup | 474 | b __arm1026_setup |
| 492 | .long cpu_arch_name | 475 | .long cpu_arch_name |
| 493 | .long cpu_elf_name | 476 | .long cpu_elf_name |
