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-rw-r--r--arch/arm/mm/proc-arm1026.S43
1 files changed, 34 insertions, 9 deletions
diff --git a/arch/arm/mm/proc-arm1026.S b/arch/arm/mm/proc-arm1026.S
index 3b59f0d67139..636672a29c6d 100644
--- a/arch/arm/mm/proc-arm1026.S
+++ b/arch/arm/mm/proc-arm1026.S
@@ -208,17 +208,18 @@ ENTRY(arm1026_coherent_user_range)
208 mov pc, lr 208 mov pc, lr
209 209
210/* 210/*
211 * flush_kern_dcache_page(void *page) 211 * flush_kern_dcache_area(void *addr, size_t size)
212 * 212 *
213 * Ensure no D cache aliasing occurs, either with itself or 213 * Ensure no D cache aliasing occurs, either with itself or
214 * the I cache 214 * the I cache
215 * 215 *
216 * - page - page aligned address 216 * - addr - kernel address
217 * - size - region size
217 */ 218 */
218ENTRY(arm1026_flush_kern_dcache_page) 219ENTRY(arm1026_flush_kern_dcache_area)
219 mov ip, #0 220 mov ip, #0
220#ifndef CONFIG_CPU_DCACHE_DISABLE 221#ifndef CONFIG_CPU_DCACHE_DISABLE
221 add r1, r0, #PAGE_SZ 222 add r1, r0, r1
2221: mcr p15, 0, r0, c7, c14, 1 @ clean+invalidate D entry 2231: mcr p15, 0, r0, c7, c14, 1 @ clean+invalidate D entry
223 add r0, r0, #CACHE_DLINESIZE 224 add r0, r0, #CACHE_DLINESIZE
224 cmp r0, r1 225 cmp r0, r1
@@ -240,7 +241,7 @@ ENTRY(arm1026_flush_kern_dcache_page)
240 * 241 *
241 * (same as v4wb) 242 * (same as v4wb)
242 */ 243 */
243ENTRY(arm1026_dma_inv_range) 244arm1026_dma_inv_range:
244 mov ip, #0 245 mov ip, #0
245#ifndef CONFIG_CPU_DCACHE_DISABLE 246#ifndef CONFIG_CPU_DCACHE_DISABLE
246 tst r0, #CACHE_DLINESIZE - 1 247 tst r0, #CACHE_DLINESIZE - 1
@@ -266,7 +267,7 @@ ENTRY(arm1026_dma_inv_range)
266 * 267 *
267 * (same as v4wb) 268 * (same as v4wb)
268 */ 269 */
269ENTRY(arm1026_dma_clean_range) 270arm1026_dma_clean_range:
270 mov ip, #0 271 mov ip, #0
271#ifndef CONFIG_CPU_DCACHE_DISABLE 272#ifndef CONFIG_CPU_DCACHE_DISABLE
272 bic r0, r0, #CACHE_DLINESIZE - 1 273 bic r0, r0, #CACHE_DLINESIZE - 1
@@ -298,15 +299,39 @@ ENTRY(arm1026_dma_flush_range)
298 mcr p15, 0, ip, c7, c10, 4 @ drain WB 299 mcr p15, 0, ip, c7, c10, 4 @ drain WB
299 mov pc, lr 300 mov pc, lr
300 301
302/*
303 * dma_map_area(start, size, dir)
304 * - start - kernel virtual start address
305 * - size - size of region
306 * - dir - DMA direction
307 */
308ENTRY(arm1026_dma_map_area)
309 add r1, r1, r0
310 cmp r2, #DMA_TO_DEVICE
311 beq arm1026_dma_clean_range
312 bcs arm1026_dma_inv_range
313 b arm1026_dma_flush_range
314ENDPROC(arm1026_dma_map_area)
315
316/*
317 * dma_unmap_area(start, size, dir)
318 * - start - kernel virtual start address
319 * - size - size of region
320 * - dir - DMA direction
321 */
322ENTRY(arm1026_dma_unmap_area)
323 mov pc, lr
324ENDPROC(arm1026_dma_unmap_area)
325
301ENTRY(arm1026_cache_fns) 326ENTRY(arm1026_cache_fns)
302 .long arm1026_flush_kern_cache_all 327 .long arm1026_flush_kern_cache_all
303 .long arm1026_flush_user_cache_all 328 .long arm1026_flush_user_cache_all
304 .long arm1026_flush_user_cache_range 329 .long arm1026_flush_user_cache_range
305 .long arm1026_coherent_kern_range 330 .long arm1026_coherent_kern_range
306 .long arm1026_coherent_user_range 331 .long arm1026_coherent_user_range
307 .long arm1026_flush_kern_dcache_page 332 .long arm1026_flush_kern_dcache_area
308 .long arm1026_dma_inv_range 333 .long arm1026_dma_map_area
309 .long arm1026_dma_clean_range 334 .long arm1026_dma_unmap_area
310 .long arm1026_dma_flush_range 335 .long arm1026_dma_flush_range
311 336
312 .align 5 337 .align 5