diff options
Diffstat (limited to 'arch/arm/mm/proc-arm1020e.S')
-rw-r--r-- | arch/arm/mm/proc-arm1020e.S | 39 |
1 files changed, 11 insertions, 28 deletions
diff --git a/arch/arm/mm/proc-arm1020e.S b/arch/arm/mm/proc-arm1020e.S index 117a946c28c8..0c33a5ed5a61 100644 --- a/arch/arm/mm/proc-arm1020e.S +++ b/arch/arm/mm/proc-arm1020e.S | |||
@@ -421,11 +421,11 @@ __arm1020e_setup: | |||
421 | #ifdef CONFIG_MMU | 421 | #ifdef CONFIG_MMU |
422 | mcr p15, 0, r0, c8, c7 @ invalidate I,D TLBs on v4 | 422 | mcr p15, 0, r0, c8, c7 @ invalidate I,D TLBs on v4 |
423 | #endif | 423 | #endif |
424 | adr r5, arm1020e_crval | ||
425 | ldmia r5, {r5, r6} | ||
424 | mrc p15, 0, r0, c1, c0 @ get control register v4 | 426 | mrc p15, 0, r0, c1, c0 @ get control register v4 |
425 | ldr r5, arm1020e_cr1_clear | ||
426 | bic r0, r0, r5 | 427 | bic r0, r0, r5 |
427 | ldr r5, arm1020e_cr1_set | 428 | orr r0, r0, r6 |
428 | orr r0, r0, r5 | ||
429 | #ifdef CONFIG_CPU_CACHE_ROUND_ROBIN | 429 | #ifdef CONFIG_CPU_CACHE_ROUND_ROBIN |
430 | orr r0, r0, #0x4000 @ .R.. .... .... .... | 430 | orr r0, r0, #0x4000 @ .R.. .... .... .... |
431 | #endif | 431 | #endif |
@@ -437,12 +437,9 @@ __arm1020e_setup: | |||
437 | * .RVI ZFRS BLDP WCAM | 437 | * .RVI ZFRS BLDP WCAM |
438 | * .011 1001 ..11 0101 | 438 | * .011 1001 ..11 0101 |
439 | */ | 439 | */ |
440 | .type arm1020e_cr1_clear, #object | 440 | .type arm1020e_crval, #object |
441 | .type arm1020e_cr1_set, #object | 441 | arm1020e_crval: |
442 | arm1020e_cr1_clear: | 442 | crval clear=0x00007f3f, mmuset=0x00003935, ucset=0x00001930 |
443 | .word 0x5f3f | ||
444 | arm1020e_cr1_set: | ||
445 | .word 0x3935 | ||
446 | 443 | ||
447 | __INITDATA | 444 | __INITDATA |
448 | 445 | ||
@@ -476,25 +473,7 @@ cpu_elf_name: | |||
476 | 473 | ||
477 | .type cpu_arm1020e_name, #object | 474 | .type cpu_arm1020e_name, #object |
478 | cpu_arm1020e_name: | 475 | cpu_arm1020e_name: |
479 | .ascii "ARM1020E" | 476 | .asciz "ARM1020E" |
480 | #ifndef CONFIG_CPU_ICACHE_DISABLE | ||
481 | .ascii "i" | ||
482 | #endif | ||
483 | #ifndef CONFIG_CPU_DCACHE_DISABLE | ||
484 | .ascii "d" | ||
485 | #ifdef CONFIG_CPU_DCACHE_WRITETHROUGH | ||
486 | .ascii "(wt)" | ||
487 | #else | ||
488 | .ascii "(wb)" | ||
489 | #endif | ||
490 | #endif | ||
491 | #ifndef CONFIG_CPU_BPREDICT_DISABLE | ||
492 | .ascii "B" | ||
493 | #endif | ||
494 | #ifdef CONFIG_CPU_CACHE_ROUND_ROBIN | ||
495 | .ascii "RR" | ||
496 | #endif | ||
497 | .ascii "\0" | ||
498 | .size cpu_arm1020e_name, . - cpu_arm1020e_name | 477 | .size cpu_arm1020e_name, . - cpu_arm1020e_name |
499 | 478 | ||
500 | .align | 479 | .align |
@@ -509,6 +488,10 @@ __arm1020e_proc_info: | |||
509 | PMD_BIT4 | \ | 488 | PMD_BIT4 | \ |
510 | PMD_SECT_AP_WRITE | \ | 489 | PMD_SECT_AP_WRITE | \ |
511 | PMD_SECT_AP_READ | 490 | PMD_SECT_AP_READ |
491 | .long PMD_TYPE_SECT | \ | ||
492 | PMD_BIT4 | \ | ||
493 | PMD_SECT_AP_WRITE | \ | ||
494 | PMD_SECT_AP_READ | ||
512 | b __arm1020e_setup | 495 | b __arm1020e_setup |
513 | .long cpu_arch_name | 496 | .long cpu_arch_name |
514 | .long cpu_elf_name | 497 | .long cpu_elf_name |