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-rw-r--r--arch/arm/mm/flush.c23
1 files changed, 21 insertions, 2 deletions
diff --git a/arch/arm/mm/flush.c b/arch/arm/mm/flush.c
index 4e283481cee1..c07222eb5ce0 100644
--- a/arch/arm/mm/flush.c
+++ b/arch/arm/mm/flush.c
@@ -18,6 +18,10 @@
18 18
19#include "mm.h" 19#include "mm.h"
20 20
21#ifdef CONFIG_ARM_ERRATA_411920
22extern void v6_icache_inval_all(void);
23#endif
24
21#ifdef CONFIG_CPU_CACHE_VIPT 25#ifdef CONFIG_CPU_CACHE_VIPT
22 26
23#define ALIAS_FLUSH_START 0xffff4000 27#define ALIAS_FLUSH_START 0xffff4000
@@ -32,10 +36,15 @@ static void flush_pfn_alias(unsigned long pfn, unsigned long vaddr)
32 36
33 asm( "mcrr p15, 0, %1, %0, c14\n" 37 asm( "mcrr p15, 0, %1, %0, c14\n"
34 " mcr p15, 0, %2, c7, c10, 4\n" 38 " mcr p15, 0, %2, c7, c10, 4\n"
39#ifndef CONFIG_ARM_ERRATA_411920
35 " mcr p15, 0, %2, c7, c5, 0\n" 40 " mcr p15, 0, %2, c7, c5, 0\n"
41#endif
36 : 42 :
37 : "r" (to), "r" (to + PAGE_SIZE - L1_CACHE_BYTES), "r" (zero) 43 : "r" (to), "r" (to + PAGE_SIZE - L1_CACHE_BYTES), "r" (zero)
38 : "cc"); 44 : "cc");
45#ifdef CONFIG_ARM_ERRATA_411920
46 v6_icache_inval_all();
47#endif
39} 48}
40 49
41void flush_cache_mm(struct mm_struct *mm) 50void flush_cache_mm(struct mm_struct *mm)
@@ -48,11 +57,16 @@ void flush_cache_mm(struct mm_struct *mm)
48 57
49 if (cache_is_vipt_aliasing()) { 58 if (cache_is_vipt_aliasing()) {
50 asm( "mcr p15, 0, %0, c7, c14, 0\n" 59 asm( "mcr p15, 0, %0, c7, c14, 0\n"
60 " mcr p15, 0, %0, c7, c10, 4\n"
61#ifndef CONFIG_ARM_ERRATA_411920
51 " mcr p15, 0, %0, c7, c5, 0\n" 62 " mcr p15, 0, %0, c7, c5, 0\n"
52 " mcr p15, 0, %0, c7, c10, 4" 63#endif
53 : 64 :
54 : "r" (0) 65 : "r" (0)
55 : "cc"); 66 : "cc");
67#ifdef CONFIG_ARM_ERRATA_411920
68 v6_icache_inval_all();
69#endif
56 } 70 }
57} 71}
58 72
@@ -67,11 +81,16 @@ void flush_cache_range(struct vm_area_struct *vma, unsigned long start, unsigned
67 81
68 if (cache_is_vipt_aliasing()) { 82 if (cache_is_vipt_aliasing()) {
69 asm( "mcr p15, 0, %0, c7, c14, 0\n" 83 asm( "mcr p15, 0, %0, c7, c14, 0\n"
84 " mcr p15, 0, %0, c7, c10, 4\n"
85#ifndef CONFIG_ARM_ERRATA_411920
70 " mcr p15, 0, %0, c7, c5, 0\n" 86 " mcr p15, 0, %0, c7, c5, 0\n"
71 " mcr p15, 0, %0, c7, c10, 4" 87#endif
72 : 88 :
73 : "r" (0) 89 : "r" (0)
74 : "cc"); 90 : "cc");
91#ifdef CONFIG_ARM_ERRATA_411920
92 v6_icache_inval_all();
93#endif
75 } 94 }
76} 95}
77 96