1 files changed, 20 insertions, 0 deletions

diff --git a/arch/arm/mm/cache-v7.S b/arch/arm/mm/cache-v7.S
index 3b24bfa3b828..07c4bc8ea0a4 100644
--- a/arch/arm/mm/cache-v7.S
+++ b/arch/arm/mm/cache-v7.S
@@ -174,6 +174,10 @@ ENTRY(v7_coherent_user_range)
         dcache_line_size r2, r3
         sub     r3, r2, #1
         bic     r12, r0, r3
+#ifdef CONFIG_ARM_ERRATA_764369
+        ALT_SMP(W(dsb))
+        ALT_UP(W(nop))
+#endif
 1:
  USER(  mcr     p15, 0, r12, c7, c11, 1 )       @ clean D line to the point of unification
         add     r12, r12, r2
@@ -223,6 +227,10 @@ ENTRY(v7_flush_kern_dcache_area)
         add     r1, r0, r1
         sub     r3, r2, #1
         bic     r0, r0, r3
+#ifdef CONFIG_ARM_ERRATA_764369
+        ALT_SMP(W(dsb))
+        ALT_UP(W(nop))
+#endif
 1:
         mcr     p15, 0, r0, c7, c14, 1          @ clean & invalidate D line / unified line
         add     r0, r0, r2
@@ -247,6 +255,10 @@ v7_dma_inv_range:
         sub     r3, r2, #1
         tst     r0, r3
         bic     r0, r0, r3
+#ifdef CONFIG_ARM_ERRATA_764369
+        ALT_SMP(W(dsb))
+        ALT_UP(W(nop))
+#endif
         mcrne   p15, 0, r0, c7, c14, 1          @ clean & invalidate D / U line
 
         tst     r1, r3
@@ -270,6 +282,10 @@ v7_dma_clean_range:
         dcache_line_size r2, r3
         sub     r3, r2, #1
         bic     r0, r0, r3
+#ifdef CONFIG_ARM_ERRATA_764369
+        ALT_SMP(W(dsb))
+        ALT_UP(W(nop))
+#endif
 1:
         mcr     p15, 0, r0, c7, c10, 1          @ clean D / U line
         add     r0, r0, r2
@@ -288,6 +304,10 @@ ENTRY(v7_dma_flush_range)
         dcache_line_size r2, r3
         sub     r3, r2, #1
         bic     r0, r0, r3
+#ifdef CONFIG_ARM_ERRATA_764369
+        ALT_SMP(W(dsb))
+        ALT_UP(W(nop))
+#endif
 1:
         mcr     p15, 0, r0, c7, c14, 1          @ clean & invalidate D / U line
         add     r0, r0, r2