diff options
Diffstat (limited to 'arch/arm/mm/cache-v7.S')
-rw-r--r-- | arch/arm/mm/cache-v7.S | 30 |
1 files changed, 20 insertions, 10 deletions
diff --git a/arch/arm/mm/cache-v7.S b/arch/arm/mm/cache-v7.S index 37c8157e116e..a3ebf7a4f49b 100644 --- a/arch/arm/mm/cache-v7.S +++ b/arch/arm/mm/cache-v7.S | |||
@@ -18,6 +18,21 @@ | |||
18 | #include "proc-macros.S" | 18 | #include "proc-macros.S" |
19 | 19 | ||
20 | /* | 20 | /* |
21 | * v7_flush_icache_all() | ||
22 | * | ||
23 | * Flush the whole I-cache. | ||
24 | * | ||
25 | * Registers: | ||
26 | * r0 - set to 0 | ||
27 | */ | ||
28 | ENTRY(v7_flush_icache_all) | ||
29 | mov r0, #0 | ||
30 | ALT_SMP(mcr p15, 0, r0, c7, c1, 0) @ invalidate I-cache inner shareable | ||
31 | ALT_UP(mcr p15, 0, r0, c7, c5, 0) @ I+BTB cache invalidate | ||
32 | mov pc, lr | ||
33 | ENDPROC(v7_flush_icache_all) | ||
34 | |||
35 | /* | ||
21 | * v7_flush_dcache_all() | 36 | * v7_flush_dcache_all() |
22 | * | 37 | * |
23 | * Flush the whole D-cache. | 38 | * Flush the whole D-cache. |
@@ -91,11 +106,8 @@ ENTRY(v7_flush_kern_cache_all) | |||
91 | THUMB( stmfd sp!, {r4-r7, r9-r11, lr} ) | 106 | THUMB( stmfd sp!, {r4-r7, r9-r11, lr} ) |
92 | bl v7_flush_dcache_all | 107 | bl v7_flush_dcache_all |
93 | mov r0, #0 | 108 | mov r0, #0 |
94 | #ifdef CONFIG_SMP | 109 | ALT_SMP(mcr p15, 0, r0, c7, c1, 0) @ invalidate I-cache inner shareable |
95 | mcr p15, 0, r0, c7, c1, 0 @ invalidate I-cache inner shareable | 110 | ALT_UP(mcr p15, 0, r0, c7, c5, 0) @ I+BTB cache invalidate |
96 | #else | ||
97 | mcr p15, 0, r0, c7, c5, 0 @ I+BTB cache invalidate | ||
98 | #endif | ||
99 | ARM( ldmfd sp!, {r4-r5, r7, r9-r11, lr} ) | 111 | ARM( ldmfd sp!, {r4-r5, r7, r9-r11, lr} ) |
100 | THUMB( ldmfd sp!, {r4-r7, r9-r11, lr} ) | 112 | THUMB( ldmfd sp!, {r4-r7, r9-r11, lr} ) |
101 | mov pc, lr | 113 | mov pc, lr |
@@ -171,11 +183,8 @@ ENTRY(v7_coherent_user_range) | |||
171 | cmp r0, r1 | 183 | cmp r0, r1 |
172 | blo 1b | 184 | blo 1b |
173 | mov r0, #0 | 185 | mov r0, #0 |
174 | #ifdef CONFIG_SMP | 186 | ALT_SMP(mcr p15, 0, r0, c7, c1, 6) @ invalidate BTB Inner Shareable |
175 | mcr p15, 0, r0, c7, c1, 6 @ invalidate BTB Inner Shareable | 187 | ALT_UP(mcr p15, 0, r0, c7, c5, 6) @ invalidate BTB |
176 | #else | ||
177 | mcr p15, 0, r0, c7, c5, 6 @ invalidate BTB | ||
178 | #endif | ||
179 | dsb | 188 | dsb |
180 | isb | 189 | isb |
181 | mov pc, lr | 190 | mov pc, lr |
@@ -309,6 +318,7 @@ ENDPROC(v7_dma_unmap_area) | |||
309 | 318 | ||
310 | .type v7_cache_fns, #object | 319 | .type v7_cache_fns, #object |
311 | ENTRY(v7_cache_fns) | 320 | ENTRY(v7_cache_fns) |
321 | .long v7_flush_icache_all | ||
312 | .long v7_flush_kern_cache_all | 322 | .long v7_flush_kern_cache_all |
313 | .long v7_flush_user_cache_all | 323 | .long v7_flush_user_cache_all |
314 | .long v7_flush_user_cache_range | 324 | .long v7_flush_user_cache_range |