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-rw-r--r--arch/arm/mm/cache-v6.S7
1 files changed, 4 insertions, 3 deletions
diff --git a/arch/arm/mm/cache-v6.S b/arch/arm/mm/cache-v6.S
index d921c1024ae0..2c6c2a7c05a0 100644
--- a/arch/arm/mm/cache-v6.S
+++ b/arch/arm/mm/cache-v6.S
@@ -96,15 +96,16 @@ ENTRY(v6_coherent_user_range)
96#ifdef HARVARD_CACHE 96#ifdef HARVARD_CACHE
97 bic r0, r0, #CACHE_LINE_SIZE - 1 97 bic r0, r0, #CACHE_LINE_SIZE - 1
981: mcr p15, 0, r0, c7, c10, 1 @ clean D line 981: mcr p15, 0, r0, c7, c10, 1 @ clean D line
99 mcr p15, 0, r0, c7, c5, 1 @ invalidate I line
100 add r0, r0, #CACHE_LINE_SIZE 99 add r0, r0, #CACHE_LINE_SIZE
101 cmp r0, r1 100 cmp r0, r1
102 blo 1b 101 blo 1b
103#endif 102#endif
104 mcr p15, 0, r0, c7, c5, 6 @ invalidate BTB
105#ifdef HARVARD_CACHE
106 mov r0, #0 103 mov r0, #0
104#ifdef HARVARD_CACHE
107 mcr p15, 0, r0, c7, c10, 4 @ drain write buffer 105 mcr p15, 0, r0, c7, c10, 4 @ drain write buffer
106 mcr p15, 0, r0, c7, c5, 0 @ I+BTB cache invalidate
107#else
108 mcr p15, 0, r0, c7, c5, 6 @ invalidate BTB
108#endif 109#endif
109 mov pc, lr 110 mov pc, lr
110 111