aboutsummaryrefslogtreecommitdiffstats
path: root/arch/arm/mm/cache-v6.S
diff options
context:
space:
mode:
Diffstat (limited to 'arch/arm/mm/cache-v6.S')
-rw-r--r--arch/arm/mm/cache-v6.S28
1 files changed, 20 insertions, 8 deletions
diff --git a/arch/arm/mm/cache-v6.S b/arch/arm/mm/cache-v6.S
index 86aa689ef1aa..47010d8114b0 100644
--- a/arch/arm/mm/cache-v6.S
+++ b/arch/arm/mm/cache-v6.S
@@ -196,6 +196,10 @@ ENTRY(v6_flush_kern_dcache_area)
196 * - end - virtual end address of region 196 * - end - virtual end address of region
197 */ 197 */
198v6_dma_inv_range: 198v6_dma_inv_range:
199#ifdef CONFIG_DMA_CACHE_RWFO
200 ldrb r2, [r0] @ read for ownership
201 strb r2, [r0] @ write for ownership
202#endif
199 tst r0, #D_CACHE_LINE_SIZE - 1 203 tst r0, #D_CACHE_LINE_SIZE - 1
200 bic r0, r0, #D_CACHE_LINE_SIZE - 1 204 bic r0, r0, #D_CACHE_LINE_SIZE - 1
201#ifdef HARVARD_CACHE 205#ifdef HARVARD_CACHE
@@ -204,6 +208,10 @@ v6_dma_inv_range:
204 mcrne p15, 0, r0, c7, c11, 1 @ clean unified line 208 mcrne p15, 0, r0, c7, c11, 1 @ clean unified line
205#endif 209#endif
206 tst r1, #D_CACHE_LINE_SIZE - 1 210 tst r1, #D_CACHE_LINE_SIZE - 1
211#ifdef CONFIG_DMA_CACHE_RWFO
212 ldrneb r2, [r1, #-1] @ read for ownership
213 strneb r2, [r1, #-1] @ write for ownership
214#endif
207 bic r1, r1, #D_CACHE_LINE_SIZE - 1 215 bic r1, r1, #D_CACHE_LINE_SIZE - 1
208#ifdef HARVARD_CACHE 216#ifdef HARVARD_CACHE
209 mcrne p15, 0, r1, c7, c14, 1 @ clean & invalidate D line 217 mcrne p15, 0, r1, c7, c14, 1 @ clean & invalidate D line
@@ -211,10 +219,6 @@ v6_dma_inv_range:
211 mcrne p15, 0, r1, c7, c15, 1 @ clean & invalidate unified line 219 mcrne p15, 0, r1, c7, c15, 1 @ clean & invalidate unified line
212#endif 220#endif
2131: 2211:
214#ifdef CONFIG_DMA_CACHE_RWFO
215 ldr r2, [r0] @ read for ownership
216 str r2, [r0] @ write for ownership
217#endif
218#ifdef HARVARD_CACHE 222#ifdef HARVARD_CACHE
219 mcr p15, 0, r0, c7, c6, 1 @ invalidate D line 223 mcr p15, 0, r0, c7, c6, 1 @ invalidate D line
220#else 224#else
@@ -222,6 +226,10 @@ v6_dma_inv_range:
222#endif 226#endif
223 add r0, r0, #D_CACHE_LINE_SIZE 227 add r0, r0, #D_CACHE_LINE_SIZE
224 cmp r0, r1 228 cmp r0, r1
229#ifdef CONFIG_DMA_CACHE_RWFO
230 ldrlo r2, [r0] @ read for ownership
231 strlo r2, [r0] @ write for ownership
232#endif
225 blo 1b 233 blo 1b
226 mov r0, #0 234 mov r0, #0
227 mcr p15, 0, r0, c7, c10, 4 @ drain write buffer 235 mcr p15, 0, r0, c7, c10, 4 @ drain write buffer
@@ -256,12 +264,12 @@ v6_dma_clean_range:
256 * - end - virtual end address of region 264 * - end - virtual end address of region
257 */ 265 */
258ENTRY(v6_dma_flush_range) 266ENTRY(v6_dma_flush_range)
259 bic r0, r0, #D_CACHE_LINE_SIZE - 1
2601:
261#ifdef CONFIG_DMA_CACHE_RWFO 267#ifdef CONFIG_DMA_CACHE_RWFO
262 ldr r2, [r0] @ read for ownership 268 ldrb r2, [r0] @ read for ownership
263 str r2, [r0] @ write for ownership 269 strb r2, [r0] @ write for ownership
264#endif 270#endif
271 bic r0, r0, #D_CACHE_LINE_SIZE - 1
2721:
265#ifdef HARVARD_CACHE 273#ifdef HARVARD_CACHE
266 mcr p15, 0, r0, c7, c14, 1 @ clean & invalidate D line 274 mcr p15, 0, r0, c7, c14, 1 @ clean & invalidate D line
267#else 275#else
@@ -269,6 +277,10 @@ ENTRY(v6_dma_flush_range)
269#endif 277#endif
270 add r0, r0, #D_CACHE_LINE_SIZE 278 add r0, r0, #D_CACHE_LINE_SIZE
271 cmp r0, r1 279 cmp r0, r1
280#ifdef CONFIG_DMA_CACHE_RWFO
281 ldrlob r2, [r0] @ read for ownership
282 strlob r2, [r0] @ write for ownership
283#endif
272 blo 1b 284 blo 1b
273 mov r0, #0 285 mov r0, #0
274 mcr p15, 0, r0, c7, c10, 4 @ drain write buffer 286 mcr p15, 0, r0, c7, c10, 4 @ drain write buffer