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-rw-r--r--arch/arm/mm/cache-v6.S54
1 files changed, 45 insertions, 9 deletions
diff --git a/arch/arm/mm/cache-v6.S b/arch/arm/mm/cache-v6.S
index 295e25dd6381..e46ecd847138 100644
--- a/arch/arm/mm/cache-v6.S
+++ b/arch/arm/mm/cache-v6.S
@@ -159,15 +159,16 @@ ENDPROC(v6_coherent_user_range)
159ENDPROC(v6_coherent_kern_range) 159ENDPROC(v6_coherent_kern_range)
160 160
161/* 161/*
162 * v6_flush_kern_dcache_page(kaddr) 162 * v6_flush_kern_dcache_area(void *addr, size_t size)
163 * 163 *
164 * Ensure that the data held in the page kaddr is written back 164 * Ensure that the data held in the page kaddr is written back
165 * to the page in question. 165 * to the page in question.
166 * 166 *
167 * - kaddr - kernel address (guaranteed to be page aligned) 167 * - addr - kernel address
168 * - size - region size
168 */ 169 */
169ENTRY(v6_flush_kern_dcache_page) 170ENTRY(v6_flush_kern_dcache_area)
170 add r1, r0, #PAGE_SZ 171 add r1, r0, r1
1711: 1721:
172#ifdef HARVARD_CACHE 173#ifdef HARVARD_CACHE
173 mcr p15, 0, r0, c7, c14, 1 @ clean & invalidate D line 174 mcr p15, 0, r0, c7, c14, 1 @ clean & invalidate D line
@@ -194,7 +195,7 @@ ENTRY(v6_flush_kern_dcache_page)
194 * - start - virtual start address of region 195 * - start - virtual start address of region
195 * - end - virtual end address of region 196 * - end - virtual end address of region
196 */ 197 */
197ENTRY(v6_dma_inv_range) 198v6_dma_inv_range:
198 tst r0, #D_CACHE_LINE_SIZE - 1 199 tst r0, #D_CACHE_LINE_SIZE - 1
199 bic r0, r0, #D_CACHE_LINE_SIZE - 1 200 bic r0, r0, #D_CACHE_LINE_SIZE - 1
200#ifdef HARVARD_CACHE 201#ifdef HARVARD_CACHE
@@ -210,6 +211,9 @@ ENTRY(v6_dma_inv_range)
210 mcrne p15, 0, r1, c7, c15, 1 @ clean & invalidate unified line 211 mcrne p15, 0, r1, c7, c15, 1 @ clean & invalidate unified line
211#endif 212#endif
2121: 2131:
214#ifdef CONFIG_SMP
215 str r0, [r0] @ write for ownership
216#endif
213#ifdef HARVARD_CACHE 217#ifdef HARVARD_CACHE
214 mcr p15, 0, r0, c7, c6, 1 @ invalidate D line 218 mcr p15, 0, r0, c7, c6, 1 @ invalidate D line
215#else 219#else
@@ -227,9 +231,12 @@ ENTRY(v6_dma_inv_range)
227 * - start - virtual start address of region 231 * - start - virtual start address of region
228 * - end - virtual end address of region 232 * - end - virtual end address of region
229 */ 233 */
230ENTRY(v6_dma_clean_range) 234v6_dma_clean_range:
231 bic r0, r0, #D_CACHE_LINE_SIZE - 1 235 bic r0, r0, #D_CACHE_LINE_SIZE - 1
2321: 2361:
237#ifdef CONFIG_SMP
238 ldr r2, [r0] @ read for ownership
239#endif
233#ifdef HARVARD_CACHE 240#ifdef HARVARD_CACHE
234 mcr p15, 0, r0, c7, c10, 1 @ clean D line 241 mcr p15, 0, r0, c7, c10, 1 @ clean D line
235#else 242#else
@@ -250,6 +257,10 @@ ENTRY(v6_dma_clean_range)
250ENTRY(v6_dma_flush_range) 257ENTRY(v6_dma_flush_range)
251 bic r0, r0, #D_CACHE_LINE_SIZE - 1 258 bic r0, r0, #D_CACHE_LINE_SIZE - 1
2521: 2591:
260#ifdef CONFIG_SMP
261 ldr r2, [r0] @ read for ownership
262 str r2, [r0] @ write for ownership
263#endif
253#ifdef HARVARD_CACHE 264#ifdef HARVARD_CACHE
254 mcr p15, 0, r0, c7, c14, 1 @ clean & invalidate D line 265 mcr p15, 0, r0, c7, c14, 1 @ clean & invalidate D line
255#else 266#else
@@ -262,6 +273,31 @@ ENTRY(v6_dma_flush_range)
262 mcr p15, 0, r0, c7, c10, 4 @ drain write buffer 273 mcr p15, 0, r0, c7, c10, 4 @ drain write buffer
263 mov pc, lr 274 mov pc, lr
264 275
276/*
277 * dma_map_area(start, size, dir)
278 * - start - kernel virtual start address
279 * - size - size of region
280 * - dir - DMA direction
281 */
282ENTRY(v6_dma_map_area)
283 add r1, r1, r0
284 teq r2, #DMA_FROM_DEVICE
285 beq v6_dma_inv_range
286 teq r2, #DMA_TO_DEVICE
287 beq v6_dma_clean_range
288 b v6_dma_flush_range
289ENDPROC(v6_dma_map_area)
290
291/*
292 * dma_unmap_area(start, size, dir)
293 * - start - kernel virtual start address
294 * - size - size of region
295 * - dir - DMA direction
296 */
297ENTRY(v6_dma_unmap_area)
298 mov pc, lr
299ENDPROC(v6_dma_unmap_area)
300
265 __INITDATA 301 __INITDATA
266 302
267 .type v6_cache_fns, #object 303 .type v6_cache_fns, #object
@@ -271,8 +307,8 @@ ENTRY(v6_cache_fns)
271 .long v6_flush_user_cache_range 307 .long v6_flush_user_cache_range
272 .long v6_coherent_kern_range 308 .long v6_coherent_kern_range
273 .long v6_coherent_user_range 309 .long v6_coherent_user_range
274 .long v6_flush_kern_dcache_page 310 .long v6_flush_kern_dcache_area
275 .long v6_dma_inv_range 311 .long v6_dma_map_area
276 .long v6_dma_clean_range 312 .long v6_dma_unmap_area
277 .long v6_dma_flush_range 313 .long v6_dma_flush_range
278 .size v6_cache_fns, . - v6_cache_fns 314 .size v6_cache_fns, . - v6_cache_fns