diff options
Diffstat (limited to 'arch/arm/mm/cache-v4.S')
-rw-r--r-- | arch/arm/mm/cache-v4.S | 9 |
1 files changed, 5 insertions, 4 deletions
diff --git a/arch/arm/mm/cache-v4.S b/arch/arm/mm/cache-v4.S index 3668611cb400..5c7da3e372e9 100644 --- a/arch/arm/mm/cache-v4.S +++ b/arch/arm/mm/cache-v4.S | |||
@@ -82,14 +82,15 @@ ENTRY(v4_coherent_user_range) | |||
82 | mov pc, lr | 82 | mov pc, lr |
83 | 83 | ||
84 | /* | 84 | /* |
85 | * flush_kern_dcache_page(void *page) | 85 | * flush_kern_dcache_area(void *addr, size_t size) |
86 | * | 86 | * |
87 | * Ensure no D cache aliasing occurs, either with itself or | 87 | * Ensure no D cache aliasing occurs, either with itself or |
88 | * the I cache | 88 | * the I cache |
89 | * | 89 | * |
90 | * - addr - page aligned address | 90 | * - addr - kernel address |
91 | * - size - region size | ||
91 | */ | 92 | */ |
92 | ENTRY(v4_flush_kern_dcache_page) | 93 | ENTRY(v4_flush_kern_dcache_area) |
93 | /* FALLTHROUGH */ | 94 | /* FALLTHROUGH */ |
94 | 95 | ||
95 | /* | 96 | /* |
@@ -141,7 +142,7 @@ ENTRY(v4_cache_fns) | |||
141 | .long v4_flush_user_cache_range | 142 | .long v4_flush_user_cache_range |
142 | .long v4_coherent_kern_range | 143 | .long v4_coherent_kern_range |
143 | .long v4_coherent_user_range | 144 | .long v4_coherent_user_range |
144 | .long v4_flush_kern_dcache_page | 145 | .long v4_flush_kern_dcache_area |
145 | .long v4_dma_inv_range | 146 | .long v4_dma_inv_range |
146 | .long v4_dma_clean_range | 147 | .long v4_dma_clean_range |
147 | .long v4_dma_flush_range | 148 | .long v4_dma_flush_range |