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-rw-r--r--arch/arm/mm/cache-v4.S6
1 files changed, 3 insertions, 3 deletions
diff --git a/arch/arm/mm/cache-v4.S b/arch/arm/mm/cache-v4.S
index 33926c9fcda6..5786adf10040 100644
--- a/arch/arm/mm/cache-v4.S
+++ b/arch/arm/mm/cache-v4.S
@@ -29,7 +29,7 @@ ENTRY(v4_flush_user_cache_all)
29 * Clean and invalidate the entire cache. 29 * Clean and invalidate the entire cache.
30 */ 30 */
31ENTRY(v4_flush_kern_cache_all) 31ENTRY(v4_flush_kern_cache_all)
32#ifdef CPU_CP15 32#ifdef CONFIG_CPU_CP15
33 mov r0, #0 33 mov r0, #0
34 mcr p15, 0, r0, c7, c7, 0 @ flush ID cache 34 mcr p15, 0, r0, c7, c7, 0 @ flush ID cache
35 mov pc, lr 35 mov pc, lr
@@ -48,7 +48,7 @@ ENTRY(v4_flush_kern_cache_all)
48 * - flags - vma_area_struct flags describing address space 48 * - flags - vma_area_struct flags describing address space
49 */ 49 */
50ENTRY(v4_flush_user_cache_range) 50ENTRY(v4_flush_user_cache_range)
51#ifdef CPU_CP15 51#ifdef CONFIG_CPU_CP15
52 mov ip, #0 52 mov ip, #0
53 mcreq p15, 0, ip, c7, c7, 0 @ flush ID cache 53 mcreq p15, 0, ip, c7, c7, 0 @ flush ID cache
54 mov pc, lr 54 mov pc, lr
@@ -116,7 +116,7 @@ ENTRY(v4_dma_inv_range)
116 * - end - virtual end address 116 * - end - virtual end address
117 */ 117 */
118ENTRY(v4_dma_flush_range) 118ENTRY(v4_dma_flush_range)
119#ifdef CPU_CP15 119#ifdef CONFIG_CPU_CP15
120 mov r0, #0 120 mov r0, #0
121 mcr p15, 0, r0, c7, c7, 0 @ flush ID cache 121 mcr p15, 0, r0, c7, c7, 0 @ flush ID cache
122#endif 122#endif